diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch new file mode 100644 index 00000000..b37e42a0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch @@ -0,0 +1,59 @@ +From e38922d3b699ba788f52163dc6c580596728016a Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Fri, 25 Mar 2022 12:52:42 +0530 +Subject: [PATCH 36/48] amd-xgbe: enable PLL_CTRL feature for fixed PHY only + +PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only. + +Also, PLL re-initialization is not needed for phy_poweroff (0,0) +command. + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: I9ed2e749b654f392741e24be69d5c01e7eb3d6ae +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 20 ++++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index a6b90470e059..6a3a5a305c92 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1993,13 +1993,16 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata) + + static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable) + { +- XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, +- XGBE_PMA_PLL_CTRL_MASK, +- enable ? XGBE_PMA_PLL_CTRL_ENABLE +- : XGBE_PMA_PLL_CTRL_DISABLE); ++ /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ ++ if (pdata->phy.autoneg == AUTONEG_DISABLE) { ++ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, ++ XGBE_PMA_PLL_CTRL_MASK, ++ enable ? XGBE_PMA_PLL_CTRL_ENABLE ++ : XGBE_PMA_PLL_CTRL_DISABLE); + +- /* Wait for command to complete */ +- usleep_range(100, 200); ++ /* Wait for command to complete */ ++ usleep_range(100, 200); ++ } + } + + static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, +@@ -2043,8 +2046,9 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + xgbe_phy_rx_reset(pdata); + + reenable_pll: +- /* Enable PLL re-initialization */ +- xgbe_phy_pll_ctrl(pdata, true); ++ /* Enable PLL re-initialization, not needed for phy_poweroff (0,0) */ ++ if (cmd != 0) ++ xgbe_phy_pll_ctrl(pdata, true); + } + + static void xgbe_phy_rrc(struct xgbe_prv_data *pdata) +-- +2.27.0 + |