diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch | 164 |
1 files changed, 164 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch new file mode 100644 index 00000000..b3805f9e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch @@ -0,0 +1,164 @@ +From 6d1d842224433aa24637a7ae1b45273137be379b Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 28 Oct 2021 17:56:57 +0000 +Subject: [PATCH 36/86] x86/amd_nb, EDAC/amd64: Move DF Indirect Read to AMD64 + EDAC + +commit b3218ae47771f943b3e222f35fc46afacba39929 upstream + +df_indirect_read() is used only for address translation. Move it to EDAC +along with the translation code. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lkml.kernel.org/r/20211028175728.121452-3-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/amd_nb.h | 1 - + arch/x86/kernel/amd_nb.c | 49 +--------------------------------- + drivers/edac/amd64_edac.c | 50 +++++++++++++++++++++++++++++++++++ + 3 files changed, 51 insertions(+), 49 deletions(-) + +diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h +index 455066a06f60..00d1a400b7a1 100644 +--- a/arch/x86/include/asm/amd_nb.h ++++ b/arch/x86/include/asm/amd_nb.h +@@ -24,7 +24,6 @@ extern int amd_set_subcaches(int, unsigned long); + + extern int amd_smn_read(u16 node, u32 address, u32 *value); + extern int amd_smn_write(u16 node, u32 address, u32 value); +-extern int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo); + + struct amd_l3_cache { + unsigned indices; +diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c +index f3e885f3dd0f..020c906f7934 100644 +--- a/arch/x86/kernel/amd_nb.c ++++ b/arch/x86/kernel/amd_nb.c +@@ -31,7 +31,7 @@ + #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d + #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e + +-/* Protect the PCI config register pairs used for SMN and DF indirect access. */ ++/* Protect the PCI config register pairs used for SMN. */ + static DEFINE_MUTEX(smn_mutex); + + static u32 *flush_words; +@@ -187,53 +187,6 @@ int amd_smn_write(u16 node, u32 address, u32 value) + } + EXPORT_SYMBOL_GPL(amd_smn_write); + +-/* +- * Data Fabric Indirect Access uses FICAA/FICAD. +- * +- * Fabric Indirect Configuration Access Address (FICAA): Constructed based +- * on the device's Instance Id and the PCI function and register offset of +- * the desired register. +- * +- * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO +- * and FICAD HI registers but so far we only need the LO register. +- */ +-int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) +-{ +- struct pci_dev *F4; +- u32 ficaa; +- int err = -ENODEV; +- +- if (node >= amd_northbridges.num) +- goto out; +- +- F4 = node_to_amd_nb(node)->link; +- if (!F4) +- goto out; +- +- ficaa = 1; +- ficaa |= reg & 0x3FC; +- ficaa |= (func & 0x7) << 11; +- ficaa |= instance_id << 16; +- +- mutex_lock(&smn_mutex); +- +- err = pci_write_config_dword(F4, 0x5C, ficaa); +- if (err) { +- pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa); +- goto out_unlock; +- } +- +- err = pci_read_config_dword(F4, 0x98, lo); +- if (err) +- pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa); +- +-out_unlock: +- mutex_unlock(&smn_mutex); +- +-out: +- return err; +-} +-EXPORT_SYMBOL_GPL(amd_df_indirect_read); + + int amd_cache_northbridges(void) + { +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index d2ad9f06abb7..034d9863bcf9 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -988,6 +988,56 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr) + return csrow; + } + ++/* Protect the PCI config register pairs used for DF indirect access. */ ++static DEFINE_MUTEX(df_indirect_mutex); ++ ++/* ++ * Data Fabric Indirect Access uses FICAA/FICAD. ++ * ++ * Fabric Indirect Configuration Access Address (FICAA): Constructed based ++ * on the device's Instance Id and the PCI function and register offset of ++ * the desired register. ++ * ++ * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO ++ * and FICAD HI registers but so far we only need the LO register. ++ */ ++static int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) ++{ ++ struct pci_dev *F4; ++ u32 ficaa; ++ int err = -ENODEV; ++ ++ if (node >= amd_nb_num()) ++ goto out; ++ ++ F4 = node_to_amd_nb(node)->link; ++ if (!F4) ++ goto out; ++ ++ ficaa = 1; ++ ficaa |= reg & 0x3FC; ++ ficaa |= (func & 0x7) << 11; ++ ficaa |= instance_id << 16; ++ ++ mutex_lock(&df_indirect_mutex); ++ ++ err = pci_write_config_dword(F4, 0x5C, ficaa); ++ if (err) { ++ pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa); ++ goto out_unlock; ++ } ++ ++ err = pci_read_config_dword(F4, 0x98, lo); ++ if (err) ++ pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa); ++ ++out_unlock: ++ mutex_unlock(&df_indirect_mutex); ++ ++out: ++ return err; ++} ++ + static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) + { + u64 dram_base_addr, dram_limit_addr, dram_hole_base; +-- +2.37.3 + |