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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3624-drm-amdgpu-si-fix-ASIC-tests.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3624-drm-amdgpu-si-fix-ASIC-tests.patch | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3624-drm-amdgpu-si-fix-ASIC-tests.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3624-drm-amdgpu-si-fix-ASIC-tests.patch new file mode 100644 index 00000000..514e8442 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3624-drm-amdgpu-si-fix-ASIC-tests.patch @@ -0,0 +1,57 @@ +From b9099d3a0d993c9e65e32ce9da6de598c1594c38 Mon Sep 17 00:00:00 2001 +From: Jean Delvare <jdelvare@suse.de> +Date: Wed, 28 Aug 2019 17:05:57 +0200 +Subject: [PATCH 3624/4256] drm/amdgpu/si: fix ASIC tests +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Comparing adev->family with CHIP constants is not correct. +adev->family can only be compared with AMDGPU_FAMILY constants and +adev->asic_type is the struct member to compare with CHIP constants. +They are separate identification spaces. + +Signed-off-by: Jean Delvare <jdelvare@suse.de> +Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10") +Cc: Ken Wang <Qingqing.Wang@amd.com> +Cc: Alex Deucher <alexander.deucher@amd.com> +Cc: "Christian König" <christian.koenig@amd.com> +Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/si.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c +index 904361451650..0d2533025227 100644 +--- a/drivers/gpu/drm/amd/amdgpu/si.c ++++ b/drivers/gpu/drm/amd/amdgpu/si.c +@@ -1887,7 +1887,7 @@ static void si_program_aspm(struct amdgpu_device *adev) + if (orig != data) + si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data); + +- if ((adev->family != CHIP_OLAND) && (adev->family != CHIP_HAINAN)) { ++ if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) { + orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0); + data &= ~PLL_RAMP_UP_TIME_0_MASK; + if (orig != data) +@@ -1936,14 +1936,14 @@ static void si_program_aspm(struct amdgpu_device *adev) + + orig = data = si_pif_phy0_rreg(adev,PB0_PIF_CNTL); + data &= ~LS2_EXIT_TIME_MASK; +- if ((adev->family == CHIP_OLAND) || (adev->family == CHIP_HAINAN)) ++ if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) + data |= LS2_EXIT_TIME(5); + if (orig != data) + si_pif_phy0_wreg(adev,PB0_PIF_CNTL, data); + + orig = data = si_pif_phy1_rreg(adev,PB1_PIF_CNTL); + data &= ~LS2_EXIT_TIME_MASK; +- if ((adev->family == CHIP_OLAND) || (adev->family == CHIP_HAINAN)) ++ if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) + data |= LS2_EXIT_TIME(5); + if (orig != data) + si_pif_phy1_wreg(adev,PB1_PIF_CNTL, data); +-- +2.17.1 + |