diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3332-drm-amdgpu-add-gfx-clock-gating-for-Arcturus.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3332-drm-amdgpu-add-gfx-clock-gating-for-Arcturus.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3332-drm-amdgpu-add-gfx-clock-gating-for-Arcturus.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3332-drm-amdgpu-add-gfx-clock-gating-for-Arcturus.patch new file mode 100644 index 00000000..9c303f29 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3332-drm-amdgpu-add-gfx-clock-gating-for-Arcturus.patch @@ -0,0 +1,40 @@ +From 639ab65f508441a7937a0d73b3e5723f683283c2 Mon Sep 17 00:00:00 2001 +From: Le Ma <le.ma@amd.com> +Date: Wed, 7 Aug 2019 14:59:07 +0800 +Subject: [PATCH 3332/4256] drm/amdgpu: add gfx clock gating for Arcturus + +Add ARCTURUS case in gfx set clockgating function. No 3d clock on Arcturus. + +Change-Id: I9893a2afea7f0b5d433baa14f48ae55a36516fac +Signed-off-by: Le Ma <le.ma@amd.com> +Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> +Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 713f73ac1c61..56faabc8fb13 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -4620,6 +4620,9 @@ static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev, + { + uint32_t data, def; + ++ if (adev->asic_type == CHIP_ARCTURUS) ++ return; ++ + amdgpu_gfx_rlc_enter_safe_mode(adev); + + /* Enable 3D CGCG/CGLS */ +@@ -4816,6 +4819,7 @@ static int gfx_v9_0_set_clockgating_state(void *handle, + case CHIP_VEGA12: + case CHIP_VEGA20: + case CHIP_RAVEN: ++ case CHIP_ARCTURUS: + gfx_v9_0_update_gfx_clock_gating(adev, + state == AMD_CG_STATE_GATE ? true : false); + break; +-- +2.17.1 + |