diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/2867-drm-amd-powerplay-avoid-double-check-feature-enabled.patch')
| -rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/2867-drm-amd-powerplay-avoid-double-check-feature-enabled.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/2867-drm-amd-powerplay-avoid-double-check-feature-enabled.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/2867-drm-amd-powerplay-avoid-double-check-feature-enabled.patch new file mode 100644 index 00000000..97774335 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/2867-drm-amd-powerplay-avoid-double-check-feature-enabled.patch @@ -0,0 +1,59 @@ +From 95dc4f0c4abe01692ddef912040db1cf1fe328b8 Mon Sep 17 00:00:00 2001 +From: Kevin Wang <kevin1.wang@amd.com> +Date: Fri, 12 Jul 2019 14:50:42 +0800 +Subject: [PATCH 2867/2940] drm/amd/powerplay: avoid double check feature + enabled + +the unforce_dpm_levels doesn't need to check feature enablement. +because the smu_get_dpm_freq_range function has check feature logic. + +Change-Id: I13fb76eedaeda9a97f84b8a86586e84c3d3b0831 +Signed-off-by: Kevin Wang <kevin1.wang@amd.com> +Reviewed-by: Evan Quan <evan.quan@amd.com> +--- + drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 23 ++++++++-------------- + 1 file changed, 8 insertions(+), 15 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +index 16a4c1ca98cf..895a4e592d5a 100644 +--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +@@ -833,27 +833,20 @@ static int navi10_force_dpm_limit_value(struct smu_context *smu, bool highest) + return ret; + } + +-static int navi10_unforce_dpm_levels(struct smu_context *smu) { +- ++static int navi10_unforce_dpm_levels(struct smu_context *smu) ++{ + int ret = 0, i = 0; + uint32_t min_freq, max_freq; + enum smu_clk_type clk_type; + +- struct clk_feature_map { +- enum smu_clk_type clk_type; +- uint32_t feature; +- } clk_feature_map[] = { +- {SMU_GFXCLK, SMU_FEATURE_DPM_GFXCLK_BIT}, +- {SMU_MCLK, SMU_FEATURE_DPM_UCLK_BIT}, +- {SMU_SOCCLK, SMU_FEATURE_DPM_SOCCLK_BIT}, ++ enum smu_clk_type clks[] = { ++ SMU_GFXCLK, ++ SMU_MCLK, ++ SMU_SOCCLK, + }; + +- for (i = 0; i < ARRAY_SIZE(clk_feature_map); i++) { +- if (!smu_feature_is_enabled(smu, clk_feature_map[i].feature)) +- continue; +- +- clk_type = clk_feature_map[i].clk_type; +- ++ for (i = 0; i < ARRAY_SIZE(clks); i++) { ++ clk_type = clks[i]; + ret = smu_get_dpm_freq_range(smu, clk_type, &min_freq, &max_freq); + if (ret) + return ret; +-- +2.17.1 + |