diff options
Diffstat (limited to 'common/recipes-kernel/linux/linux-yocto-4.19.8/2625-drm-amdgpu-discovery-init-reg-base-offset-via-ip-dis.patch')
-rw-r--r-- | common/recipes-kernel/linux/linux-yocto-4.19.8/2625-drm-amdgpu-discovery-init-reg-base-offset-via-ip-dis.patch | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/linux-yocto-4.19.8/2625-drm-amdgpu-discovery-init-reg-base-offset-via-ip-dis.patch b/common/recipes-kernel/linux/linux-yocto-4.19.8/2625-drm-amdgpu-discovery-init-reg-base-offset-via-ip-dis.patch new file mode 100644 index 00000000..60ddf7a8 --- /dev/null +++ b/common/recipes-kernel/linux/linux-yocto-4.19.8/2625-drm-amdgpu-discovery-init-reg-base-offset-via-ip-dis.patch @@ -0,0 +1,52 @@ +From 1dbc2c5456ac56cce50017edaa0ea9020c7cabf4 Mon Sep 17 00:00:00 2001 +From: Xiaojie Yuan <xiaojie.yuan@amd.com> +Date: Wed, 5 Jun 2019 17:58:57 +0800 +Subject: [PATCH 2625/2940] drm/amdgpu/discovery: init reg base offset via ip + discovery for navi14 + +Add IP discovery for navi14. + +Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c | 17 +++++++++++++++-- + 1 file changed, 15 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c b/drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c +index 28f3d6490649..864668a7f1d2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c ++++ b/drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c +@@ -29,8 +29,20 @@ + + int navi14_reg_base_init(struct amdgpu_device *adev) + { +- /* HW has more IP blocks, only initialized the blocke needed by driver */ +- uint32_t i; ++ int r, i; ++ ++ if (amdgpu_discovery) { ++ r = amdgpu_discovery_reg_base_init(adev); ++ if (r) { ++ DRM_WARN("failed to init reg base from ip discovery table, " ++ "fallback to legacy init method\n"); ++ goto legacy_init; ++ } ++ ++ return 0; ++ } ++ ++legacy_init: + for (i = 0 ; i < MAX_INSTANCE ; ++i) { + adev->reg_offset[GC_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); + adev->reg_offset[HDP_HWIP][i] = (uint32_t *)(&(HDP_BASE.instance[i])); +@@ -49,5 +61,6 @@ int navi14_reg_base_init(struct amdgpu_device *adev) + adev->reg_offset[THM_HWIP][i] = (uint32_t *)(&(THM_BASE.instance[i])); + adev->reg_offset[CLK_HWIP][i] = (uint32_t *)(&(CLK_BASE.instance[i])); + } ++ + return 0; + } +-- +2.17.1 + |