diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/1024-drm-amd-powerplay-enable-power-down-asic-task.patch')
| -rw-r--r-- | common/recipes-kernel/linux/files/1024-drm-amd-powerplay-enable-power-down-asic-task.patch | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/1024-drm-amd-powerplay-enable-power-down-asic-task.patch b/common/recipes-kernel/linux/files/1024-drm-amd-powerplay-enable-power-down-asic-task.patch new file mode 100644 index 00000000..865d856a --- /dev/null +++ b/common/recipes-kernel/linux/files/1024-drm-amd-powerplay-enable-power-down-asic-task.patch @@ -0,0 +1,101 @@ +From 5bc592edebc373f0043fe32a366b6a35905eecd7 Mon Sep 17 00:00:00 2001 +From: Rex Zhu <Rex.Zhu@amd.com> +Date: Tue, 29 Dec 2015 11:22:34 +0800 +Subject: [PATCH 1024/1050] drm/amd/powerplay: enable power down asic task. + +Change-Id: I2d5a87b0403624dd39840516fe5bca5cb23d3d76 + +Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> + +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c | 3 +-- + drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 17 ++++++++++++++++- + drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 2 ++ + drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 ++ + 4 files changed, 21 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c +index f0b4491..5cd1234 100644 +--- a/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c ++++ b/drivers/gpu/drm/amd/powerplay/eventmgr/eventtasks.c +@@ -68,8 +68,7 @@ int pem_task_adjust_power_state(struct pp_eventmgr *eventmgr, struct pem_event_d + + int pem_task_power_down_asic(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data) + { +- /* TODO */ +- return 0; ++ return phm_power_down_asic(eventmgr->hwmgr); + } + + int pem_task_set_boot_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data) +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c +index 551b4bc..7888dd8 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c +@@ -90,6 +90,22 @@ int phm_setup_asic(struct pp_hwmgr *hwmgr) + return 0; + } + ++int phm_power_down_asic(struct pp_hwmgr *hwmgr) ++{ ++ PHM_FUNC_CHECK(hwmgr); ++ ++ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, ++ PHM_PlatformCaps_TablelessHardwareInterface)) { ++ if (NULL != hwmgr->hwmgr_func->power_off_asic) ++ return hwmgr->hwmgr_func->power_off_asic(hwmgr); ++ } else { ++ return phm_dispatch_table(hwmgr, &(hwmgr->power_down_asic), ++ NULL, NULL); ++ } ++ ++ return 0; ++} ++ + int phm_set_power_state(struct pp_hwmgr *hwmgr, + const struct pp_hw_power_state *pcurrent_state, + const struct pp_hw_power_state *pnew_power_state) +@@ -247,7 +263,6 @@ int phm_register_thermal_interrupt(struct pp_hwmgr *hwmgr, const void *info) + */ + int phm_start_thermal_controller(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *temperature_range) + { +- + return phm_dispatch_table(hwmgr, &(hwmgr->start_thermal_controller), temperature_range, NULL); + } + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +index 1f998c3..f333886 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +@@ -385,5 +385,7 @@ extern int phm_get_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type + + extern int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks); + ++extern int phm_power_down_asic(struct pp_hwmgr *hwmgr); ++ + #endif /* _HARDWARE_MANAGER_H_ */ + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +index 3947dd1..af2074b 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h +@@ -308,6 +308,7 @@ struct pp_hwmgr_func { + const struct pp_hw_power_state *state, struct pp_clock_info *clock_info); + int (*get_clock_by_type)(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks); + int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks); ++ int (*power_off_asic)(struct pp_hwmgr *hwmgr); + }; + + struct pp_table_func { +@@ -561,6 +562,7 @@ struct pp_hwmgr { + enum PP_DAL_POWERLEVEL dal_power_level; + struct phm_dynamic_state_info dyn_state; + struct phm_runtime_table_header setup_asic; ++ struct phm_runtime_table_header power_down_asic; + struct phm_runtime_table_header disable_dynamic_state_management; + struct phm_runtime_table_header enable_dynamic_state_management; + struct phm_runtime_table_header set_power_state; +-- +1.9.1 + |