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-rw-r--r--common/recipes-kernel/linux/files/0517-drm-amdgpu-use-PT-for-VM-sync-on-unmap.patch67
1 files changed, 67 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0517-drm-amdgpu-use-PT-for-VM-sync-on-unmap.patch b/common/recipes-kernel/linux/files/0517-drm-amdgpu-use-PT-for-VM-sync-on-unmap.patch
new file mode 100644
index 00000000..4a0d3c99
--- /dev/null
+++ b/common/recipes-kernel/linux/files/0517-drm-amdgpu-use-PT-for-VM-sync-on-unmap.patch
@@ -0,0 +1,67 @@
+From a60c42320b375e80e52e7861acd6b81c61f05166 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Tue, 1 Sep 2015 15:33:25 +0200
+Subject: [PATCH 0517/1050] drm/amdgpu: use PT for VM sync on unmap
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Instead of the array which is used for ID management.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
+Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 19 ++++++-------------
+ 1 file changed, 6 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+index 83b7ce6..5848564 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+@@ -627,9 +627,14 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
+ {
+ uint64_t mask = AMDGPU_VM_PTE_COUNT - 1;
+ uint64_t last_pte = ~0, last_dst = ~0;
++ void *owner = AMDGPU_FENCE_OWNER_VM;
+ unsigned count = 0;
+ uint64_t addr;
+
++ /* sync to everything on unmapping */
++ if (!(flags & AMDGPU_PTE_VALID))
++ owner = AMDGPU_FENCE_OWNER_UNDEFINED;
++
+ /* walk over the address space and update the page tables */
+ for (addr = start; addr < end; ) {
+ uint64_t pt_idx = addr >> amdgpu_vm_block_size;
+@@ -638,8 +643,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_device *adev,
+ uint64_t pte;
+ int r;
+
+- amdgpu_sync_resv(adev, &ib->sync, pt->tbo.resv,
+- AMDGPU_FENCE_OWNER_VM);
++ amdgpu_sync_resv(adev, &ib->sync, pt->tbo.resv, owner);
+ r = reservation_object_reserve_shared(pt->tbo.resv);
+ if (r)
+ return r;
+@@ -790,17 +794,6 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
+
+ ib->length_dw = 0;
+
+- if (!(flags & AMDGPU_PTE_VALID)) {
+- unsigned i;
+-
+- for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
+- struct amdgpu_fence *f = vm->ids[i].last_id_use;
+- r = amdgpu_sync_fence(adev, &ib->sync, &f->base);
+- if (r)
+- return r;
+- }
+- }
+-
+ r = amdgpu_vm_update_ptes(adev, vm, ib, mapping->it.start,
+ mapping->it.last + 1, addr + mapping->offset,
+ flags, gtt_flags);
+--
+1.9.1
+