diff options
Diffstat (limited to 'common/recipes-kernel/linux/files/0337-drm-amdgpu-set-fw_version-and-feature_version-for-sm.patch')
-rw-r--r-- | common/recipes-kernel/linux/files/0337-drm-amdgpu-set-fw_version-and-feature_version-for-sm.patch | 204 |
1 files changed, 204 insertions, 0 deletions
diff --git a/common/recipes-kernel/linux/files/0337-drm-amdgpu-set-fw_version-and-feature_version-for-sm.patch b/common/recipes-kernel/linux/files/0337-drm-amdgpu-set-fw_version-and-feature_version-for-sm.patch new file mode 100644 index 00000000..c1e9f215 --- /dev/null +++ b/common/recipes-kernel/linux/files/0337-drm-amdgpu-set-fw_version-and-feature_version-for-sm.patch @@ -0,0 +1,204 @@ +From 595fd013f795daeed0c7ddda02d8e0c51d8ce76c Mon Sep 17 00:00:00 2001 +From: Jammy Zhou <Jammy.Zhou@amd.com> +Date: Tue, 4 Aug 2015 11:44:19 +0800 +Subject: [PATCH 0337/1050] drm/amdgpu: set fw_version and feature_version for + smu fw loading +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The fw_version and feature_verion should be set correctly when the +firmwares are loaded by SMU on Tonga/Carrzio/Iceland + +Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> +Reviewed-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 37 ++++++++++++++++++++-------------- + drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 7 ++++--- + drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 7 ++++--- + 3 files changed, 30 insertions(+), 21 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index 0ac38ee..f5a42ab 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -587,6 +587,7 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + int err; + struct amdgpu_firmware_info *info = NULL; + const struct common_firmware_header *header = NULL; ++ const struct gfx_firmware_header_v1_0 *cp_hdr; + + DRM_DEBUG("\n"); + +@@ -611,6 +612,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->gfx.pfp_fw); + if (err) + goto out; ++ cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; ++ adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); ++ adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", chip_name); + err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); +@@ -619,6 +623,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->gfx.me_fw); + if (err) + goto out; ++ cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; ++ adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); ++ adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name); + err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); +@@ -627,12 +634,18 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->gfx.ce_fw); + if (err) + goto out; ++ cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; ++ adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); ++ adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); + err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); + if (err) + goto out; + err = amdgpu_ucode_validate(adev->gfx.rlc_fw); ++ cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.rlc_fw->data; ++ adev->gfx.rlc_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); ++ adev->gfx.rlc_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name); + err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); +@@ -641,6 +654,9 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->gfx.mec_fw); + if (err) + goto out; ++ cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; ++ adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); ++ adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name); + err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); +@@ -648,6 +664,12 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->gfx.mec2_fw); + if (err) + goto out; ++ cp_hdr = (const struct gfx_firmware_header_v1_0 *) ++ adev->gfx.mec2_fw->data; ++ adev->gfx.mec2_fw_version = le32_to_cpu( ++ cp_hdr->header.ucode_version); ++ adev->gfx.mec2_feature_version = le32_to_cpu( ++ cp_hdr->ucode_feature_version); + } else { + err = 0; + adev->gfx.mec2_fw = NULL; +@@ -2272,9 +2294,6 @@ static int gfx_v8_0_rlc_load_microcode(struct amdgpu_device *adev) + + hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; + amdgpu_ucode_print_rlc_hdr(&hdr->header); +- adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version); +- adev->gfx.rlc_feature_version = le32_to_cpu( +- hdr->ucode_feature_version); + + fw_data = (const __le32 *)(adev->gfx.rlc_fw->data + + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); +@@ -2360,12 +2379,6 @@ static int gfx_v8_0_cp_gfx_load_microcode(struct amdgpu_device *adev) + amdgpu_ucode_print_gfx_hdr(&pfp_hdr->header); + amdgpu_ucode_print_gfx_hdr(&ce_hdr->header); + amdgpu_ucode_print_gfx_hdr(&me_hdr->header); +- adev->gfx.pfp_fw_version = le32_to_cpu(pfp_hdr->header.ucode_version); +- adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version); +- adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version); +- adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version); +- adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version); +- adev->gfx.pfp_feature_version = le32_to_cpu(pfp_hdr->ucode_feature_version); + + gfx_v8_0_cp_gfx_enable(adev, false); + +@@ -2621,9 +2634,6 @@ static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev) + + mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; + amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); +- adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); +- adev->gfx.mec_feature_version = le32_to_cpu( +- mec_hdr->ucode_feature_version); + + fw_data = (const __le32 *) + (adev->gfx.mec_fw->data + +@@ -2642,9 +2652,6 @@ static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev) + + mec2_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec2_fw->data; + amdgpu_ucode_print_gfx_hdr(&mec2_hdr->header); +- adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version); +- adev->gfx.mec2_feature_version = le32_to_cpu( +- mec2_hdr->ucode_feature_version); + + fw_data = (const __le32 *) + (adev->gfx.mec2_fw->data + +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +index 01bd5c9..a988dfb 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c +@@ -121,6 +121,7 @@ static int sdma_v2_4_init_microcode(struct amdgpu_device *adev) + int err, i; + struct amdgpu_firmware_info *info = NULL; + const struct common_firmware_header *header = NULL; ++ const struct sdma_firmware_header_v1_0 *hdr; + + DRM_DEBUG("\n"); + +@@ -142,6 +143,9 @@ static int sdma_v2_4_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->sdma[i].fw); + if (err) + goto out; ++ hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; ++ adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); ++ adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); + + if (adev->firmware.smu_load) { + info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; +@@ -541,9 +545,6 @@ static int sdma_v2_4_load_microcode(struct amdgpu_device *adev) + hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; + amdgpu_ucode_print_sdma_hdr(&hdr->header); + fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; +- adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); +- adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); +- + fw_data = (const __le32 *) + (adev->sdma[i].fw->data + + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +index cf9bc2e..2b86569 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c +@@ -159,6 +159,7 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) + int err, i; + struct amdgpu_firmware_info *info = NULL; + const struct common_firmware_header *header = NULL; ++ const struct sdma_firmware_header_v1_0 *hdr; + + DRM_DEBUG("\n"); + +@@ -183,6 +184,9 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev) + err = amdgpu_ucode_validate(adev->sdma[i].fw); + if (err) + goto out; ++ hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; ++ adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); ++ adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); + + if (adev->firmware.smu_load) { + info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; +@@ -630,9 +634,6 @@ static int sdma_v3_0_load_microcode(struct amdgpu_device *adev) + hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma[i].fw->data; + amdgpu_ucode_print_sdma_hdr(&hdr->header); + fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4; +- adev->sdma[i].fw_version = le32_to_cpu(hdr->header.ucode_version); +- adev->sdma[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); +- + fw_data = (const __le32 *) + (adev->sdma[i].fw->data + + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); +-- +1.9.1 + |