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path: root/arch/x86/include/asm/msr-index.h
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2020-11-05perf/x86/amd/ibs: Fix raw sample data accumulationKim Phillips
2020-06-11x86/speculation: Add Special Register Buffer Data Sampling (SRBDS) mitigationMark Gross
2019-11-12x86/bugs: Add ITLB_MULTIHIT bug infrastructureVineela Tummalapalli
2019-11-12x86/speculation/taa: Add mitigation for TSX Async AbortPawan Gupta
2019-11-12x86/msr: Add the IA32_TSX_CTRL MSRPawan Gupta
2019-08-29x86/CPU/AMD: Clear RDRAND CPUID bit on AMD family 15h/16hTom Lendacky
2019-05-14x86/speculation/mds: Add basic bug infrastructure for MDSAndi Kleen
2019-05-14x86/msr-index: Cleanup bit definesThomas Gleixner
2019-03-13x86: Add TSX Force Abort CPUID/MSRPeter Zijlstra (Intel)
2018-12-29kvm: x86: Add AMD's EX_CFG to the list of ignored MSRsEduardo Habkost
2018-12-05x86/speculation: Prepare for per task indirect branch speculation controlTim Chen
2018-08-15x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentryPaolo Bonzini
2018-08-15x86/KVM/VMX: Add L1D MSR based flushPaolo Bonzini
2018-05-22x86/bugs: Rename SSBD_NO to SSB_NOKonrad Rzeszutek Wilk
2018-05-22x86/speculation: Add virtualized speculative store bypass disable supportTom Lendacky
2018-05-22x86/bugs: Rename _RDS to _SSBDKonrad Rzeszutek Wilk
2018-05-22x86/process: Allow runtime control of Speculative Store BypassThomas Gleixner
2018-05-22x86/bugs/intel: Set proper CPU features and setup RDSKonrad Rzeszutek Wilk
2018-02-07x86/msr: Add definitions for new speculation control MSRsDavid Woodhouse
2018-01-17x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSCTom Lendacky
2018-01-17x86/cpu/AMD: Make LFENCE a serializing instructionTom Lendacky
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman
2017-07-18x86/cpu/AMD: Add the Secure Memory Encryption CPU featureTom Lendacky
2017-07-06Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
2017-07-04Merge tag 'pm-4.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafa...Linus Torvalds
2017-06-07kvm: vmx: Check value written to IA32_BNDCFGSJim Mattson
2017-05-23perf/x86: Add sysfs entry to freeze counters on SMIKan Liang
2017-05-16Merge branch 'utilities' of git://git.kernel.org/pub/scm/linux/kernel/git/len...Rafael J. Wysocki
2017-04-29x86: msr-index.h: fix shifts to ULL results in HWP macros.Len Brown
2017-04-29x86: msr-index.h: define HWP.EPP valuesLen Brown
2017-03-20x86/arch_prctl: Add ARCH_[GET|SET]_CPUIDKyle Huey
2017-03-20x86/cpufeature: Detect CPUID faulting supportKyle Huey
2017-03-20x86/msr: Rename MISC_FEATURE_ENABLES to MISC_FEATURES_ENABLESKyle Huey
2017-03-11x86/process: Correct and optimize TIF_BLOCKSTEP switchKyle Huey
2017-03-01Merge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/len...Rafael J. Wysocki
2017-03-01x86 msr_index.h: Define MSR_MISC_FEATURE_CONTROLLen Brown
2017-03-01x86 msr-index.h: Define Atom specific core ratio MSR locationsLen Brown
2017-03-01tools/power turbostat: Baytrail c-state supportLen Brown
2017-03-01x86: msr-index.h: Remove unused MSR_NHM_SNB_PKG_CST_CFG_CTLLen Brown
2017-03-01x86: msr-index.h: Define MSR_PKG_CST_CONFIG_CONTROLLen Brown
2017-02-25x86: msr-index.h: define EPB mid-pointsLen Brown
2017-02-04x86/msr: Add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bitGrzegorz Andrejczuk
2016-11-23x86/mce: Include the PPIN in MCE records when availableTony Luck
2016-10-14x86: Remove duplicate rtit status MSR macroLongpeng(Mike)
2016-07-07x86: remove duplicate turbo ratio limit MSRsSrinivas Pandruvada
2016-05-05perf/x86/intel/pt: Add IP filtering register/CPUID bitsAlexander Shishkin
2016-05-05perf/x86/intel/pt: Move PT specific MSR bit definitions to a private headerAlexander Shishkin
2016-04-23perf/x86/intel/rapl: Support Skylake RAPL domainsSrinivas Pandruvada
2016-04-13Merge tag 'v4.6-rc3' into perf/core, to refresh the treeIngo Molnar
2016-04-08Merge branches 'pm-core', 'powercap' and 'pm-tools'Rafael J. Wysocki
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