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2023-06-21ARM: dts: Move .dts files to vendor sub-directoriesRob Herring
The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
2023-03-30ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum ↵Tudor Ambarus
frequency sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V, increase its maximum supported frequency to 104MHz. The increasing of the spi-max-frequency value requires the setting of the "CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7. The sst26vf064b datasheet specifies just a minimum value for the "CE# Not Active Hold Time" and it advertises it to 5 ns. There's no maximum time specified. I determined experimentally that 5 ns for the spi-cs-setup-ns is not enough when the flash is operated close to its maximum frequency and tests showed that 7 ns is just fine, so set the spi-cs-setup-ns dt property to 7. With the increase of frequency the reads are now faster with ~33%. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-02-08ARM: dts: at91: sam9x60: Add DMA bindings for the flexcom nodesManikandan Muralidharan
Add dma bindings for flexcom nodes in the soc dtsi file. Users those who don't wish to use the DMA function for their flexcom functions can overwrite the dma bindings in the board device tree file. Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> [durai.manickamkr@microchip.com: fixed code indentation and updated commit log] Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230207110651.197268-6-durai.manickamkr@microchip.com
2023-02-08ARM: dts: at91: sam9x60: fix spi4 nodeDurai Manickam KR
The ranges, #address-cells and #size-cells properties are not required, remove them from the spi4 node. Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230207110651.197268-4-durai.manickamkr@microchip.com
2023-02-08ARM: dts: at91: sam9x60: move flexcom definitionsManikandan Muralidharan
Move the flexcom definitions from board specific DTS file to the SoC specific DTSI file for sam9x60ek. [durai.manickamkr@microchip.com: Logical split-up of this patch and added missing UART5 compatibles] Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> Signed-off-by: Hari Prasath Gujulan Elango <Hari.PrasathGE@microchip.com> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230207110651.197268-3-durai.manickamkr@microchip.com
2023-02-08ARM: dts: at91: sam9x60: Fix the label numbering for the flexcom functionsManikandan Muralidharan
Fixed the label numbering of the flexcom functions so that all 13 flexcom functions of sam9x60 are in the following order when the missing flexcom functions are added: flx0: uart0, spi0, i2c0 flx1: uart1, spi1, i2c1 flx2: uart2, spi2, i2c2 flx3: uart3, spi3, i2c3 flx4: uart4, spi4, i2c4 flx5: uart5, spi5, i2c5 flx6: uart6, i2c6 flx7: uart7, i2c7 flx8: uart8, i2c8 flx9: uart9, i2c9 flx10: uart10, i2c10 flx11: uart11, i2c11 flx12: uart12, i2c12 Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com> Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230207110651.197268-2-durai.manickamkr@microchip.com
2022-11-01ARM: dts: at91: sam9x60ek: remove status = "okay" for regulatorsClaudiu Beznea
Remove status = "okay" for sam9x60ek regulator as okay is the default status. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20221026124114.985876-12-claudiu.beznea@microchip.com
2022-09-16ARM: dts: at91: Add `atmel,usart-mode` required property to serial nodesSergiu Moga
Add the missing required DT property `atmel,usart-mode` to the serial nodes of Atmel/Microchip DT files. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-4-sergiu.moga@microchip.com
2022-09-16ARM: dts: at91: sam9x60ek: Add DBGU compatibles to uart1Sergiu Moga
Maintain consistency among the compatibles of the serial nodes of sam9x60ek and highlight the incremental characteristic of its serial IP's by making sure that all serial nodes contain both the sam9x60 and sam9260 usart/dbgu compatibles. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220913142205.162399-3-sergiu.moga@microchip.com
2022-08-29ARM: dts: at91: sam9x60ek: remove simple-bus for regulatorsClaudiu Beznea
Keep regulators as individual devices. There is no need to have them under simple bus. This will throw compilation warnings like: - unnecessary #address-cells/#size-cells without "ranges" or child "reg" property. - node has a unit name, but no reg or ranges property. While at it move it down a bit in the file to keep entries sorted alphabetically. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220826083927.3107272-10-claudiu.beznea@microchip.com
2022-08-02Merge tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM DT updates from Arnd Bergmann: "As usual, the bulk of the changes for the SoC tree are devicetree file updates, and most of these changes are for 64-bit embedded machines. As before, there are a ton of style cleanups, and additional hardware support for existing machines. Looking only at the new SoC, the notable additions are: - A whole family of Broadcom broadband SoCs, both 32-bit and 64-bit: BCM63178, BCM63158, BCM4912, BCM6858, BCM6878, BCM6846, BCM63146, BCM6856, BCM6855, BCM6756, BCM63148, and BCM6813. Each SoC comes with a corresponding reference board. - The new NXP i.MX93 SoC, the follow-up to the popular i.MX6 and i.MX8 embedded SoCs, now using Cortex-A55 cores and the Ethos-U65 NPU. - Qualcomm Snapdragon 8cx Gen3 (SC8280XP), the current high end of Arm based Laptop SoCs, and its automotive cousin, the SA8540P. The SC8280XP is used in the Lenovo Thinkpad X13s laptop that also gets added here in addition to the reference boards. - Allwinner H616, a newer version of the H6 SoC, targeted at Set-top-box applications. It comes with dts files for the Orange Pi zero2 single-board computer and the X96 Mate set-top-box - Marvell Prestera 98DX2530 (AlleyCat5), a network switch chip in the Armada SoC family based on the Cortex-A55 core. New machines based on previously supported SoCs include: - Several new machines on NXP i.MX platforms: multiple Toradex Colibri boards using the "Iris" and "Ixora" carriers, DH electronics i.MX8M Plus DHCOM and PDK2, TQ-Systems TQMa8MPQL, and phytech phyBOARD-Polis-i.MX8MM. - Google Chameleon v3 FPGA board based on Intel Arria10 and Stratix 10 Software Virtual platform, both in the SoCFPGA platform. - Two new wireless devices based on Broadcom SoCs: The Asus GT-AX6000 Router and the Cisco Meraki MR26 access point - Improved Chromebook support for both the Mediatek and Qualcomm SoC families brought added machines: Acer Chromebook 514 (MT8192), Acer Chromebook Spin 513 (MT8195) and a couple of SC7180 based machines including the Lenovo IdeaPad Chromebook Duet 3. - Xiaomi Mi Mix2s, LG G7 and LG V35 are mobile phones based on Qualcomm SDM845, while Mi 5s Plus is based on MSM8996. - Finally, there are a few development board on other chips: PCB8309 (Microchip lan966x), Radxa Rock Pi S (Rockchips RK3308) DH DRC Compact (ST STM32MP1) and Inforce IFC6560 (Qualcomm SDM660)" * tag 'arm-dt-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (829 commits) dt-bindings: soc: bcm: use absolute path to other schema dt-bindings: soc: bcm: drop quotes when not needed dt-bindings: soc: microchip: use absolute path to other schema dt-bindings: soc: microchip: drop quotes when not needed ARM: dts: lan966x: keep lan966 entries alphabetically sorted ARM: dts: lan966x: add support for pcb8309 dt-bindings: arm: at91: add lan966 pcb8309 board ARM: dts: lan966x: Enable network driver on pcb8291 ARM: dts: lan966x: Disable can0 on pcb8291 ARM: dts: lan966x: Add gpio-restart dt-bindings: arm: aspeed: add Aspeed Evaluation boards arm64: dts: qcom: Add support for Xiaomi Mi Mix2s dt-bindings: arm: qcom: Add Xiaomi Mi Mix2s bindings dt-bindings: arm: qcom: Document lg,judyln and lg,judyp devices dt-bindings: arm: qcom: add missing SM6350 board compatibles dt-bindings: arm: qcom: add missing SM6125 board compatibles dt-bindings: arm: qcom: add missing SDM845 board compatibles dt-bindings: arm: qcom: add missing SDM636 board compatibles dt-bindings: arm: qcom: add missing SDM630 board compatibles dt-bindings: arm: qcom: add missing QCS404 board compatibles ...
2022-06-28ARM: dts: at91: sam9x60ek: fix eeprom compatible and sizeEugen Hristev
The board has a microchip 24aa025e48 eeprom, which is a 2 Kbits memory, so it's compatible with at24c02 not at24c32. Also the size property is wrong, it's not 128 bytes, but 256 bytes. Thus removing and leaving it to the default (256). Fixes: 1e5f532c27371 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220607090455.80433-1-eugen.hristev@microchip.com
2022-06-27ARM: dts: at91: drop unneeded status from gpio-keysKrzysztof Kozlowski
Nodes do not need explicit status=okay. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220616005333.18491-40-krzysztof.kozlowski@linaro.org
2022-06-27ARM: dts: at91: align gpio-key node names with dtschemaKrzysztof Kozlowski
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220616005333.18491-38-krzysztof.kozlowski@linaro.org
2022-06-16ARM: dts: at91: adjust whitespace around '='Krzysztof Kozlowski
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220526204110.831805-2-krzysztof.kozlowski@linaro.org
2022-03-04ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15Mihai Sain
This regulator is powering the vddcore pins from MPU. Its real value on the board and in the MPU datasheet is 1.15V. Signed-off-by: Mihai Sain <mihai.sain@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220302160235.28336-1-nicolas.ferre@microchip.com
2021-08-02ARM: dts: at91: use the right property for shutdown controllerNicolas Ferre
The wrong property "atmel,shdwc-debouncer" was used to specify the debounce delay for the shutdown controler. Replace it with the documented and implemented property "debounce-delay-us", as mentioned in v4 driver submission. See: https://lore.kernel.org/r/1458134390-23847-3-git-send-email-nicolas.ferre@atmel.com/ Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reported-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20210730172729.28093-1-nicolas.ferre@microchip.com/
2021-07-27ARM: dts: at91: add pinctrl-{names, 0} for all gpiosClaudiu Beznea
Add pinctrl-names and pinctrl-0 properties on controllers that claims to use pins to avoid failures due to commit 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges") and also to avoid using pins that may be claimed my other IPs. Fixes: b7c2b6157079 ("ARM: at91: add Atmel's SAMA5D3 Xplained board") Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Fixes: 38153a017896 ("ARM: at91/dt: sama5d4: add dts for sama5d4 xplained board") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210727074006.1609989-1-claudiu.beznea@microchip.com Cc: <stable@vger.kernel.org> # v5.7+
2021-04-26Merge tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM devicetree updates from Arnd Bergmann: "There are six new SoCs added this time. Apple M1 and Nuvoton WPCM450 have separate branches because they are new SoC families that require changes outside of device tree files. The other four are variations of already supported chips and get merged through this branch: - STMicroelectronics STM32H750 is one of many variants of STM32 microcontrollers based on the Cortex-M7 core. This is particularly notable since we rarely add support for new MMU-less chips these days. In this case, the board that gets added along with the platform is not a SoC reference platform but the "Art Pi" (https://art-pi.gitee.io/website/) machine that was originally design for the RT-Thread RTOS. - NXP i.MX8QuadMax is a variant of the growing i.MX8 embedded/industrial SoC family, using two Cortex-A72 and four Cortex-A53 cores. It gets added along with its reference board, the "NXP i.MX8QuadMax Multisensory Enablement Kit". - Qualcomm SC7280 is a Laptop SoC following the SC7180 (Snapdragon 7c) that is used in some Chromebooks and Windows laptops. Only a reference board is added for the moment. - TI AM64x Sita4ra is a new version of the K3 SoC family for industrial control, motor control, remote IO, IoT gateway etc., similar to the older AM65x family. Two reference machines are added alongside. Among the newly added machines, there is a very clear skew towards 64-bit machines now, with 12 32-bit machines compared to 23 64-bit machines. The full list sorted by SoC is: - ASpeed AST2500 BMC: ASRock E3C246D4I Xeon server board - Allwinner A10: Topwise A721 Tablet - Amlogic GXL: MeCool KII TV box - Amlogic GXM: Mecool KIII, Minix Neo U9-H TV boxes - Broadcom BCM4908: TP-Link Archer C2300 V1 router - MStar SSD202D: M5Stack UnitV2 camera - Marvell Armada 38x: ATL-x530 ethernet switch - Mediatek MT8183 Chromebooks: Lenovo 10e, Acer Spin 311, Asus Flip CM3, Asus Detachable CM3 - Mediatek MT8516/MT8183: OLogic Pumpkin Board - NXP i.MX7: reMarkable Tablet - NXP i.MX8M: Kontron pitx-imx8m, Engicam i.Core MX8M Mini - Nuvoton NPCM730: Quanta GBS BMC - Qualcomm X55: Telit FN980 TLB SoM, Thundercomm TurboX T55 SoM - Qualcomm MSM8998: OnePlus 5/5T phones - Qualcomm SM8350: Snapdragon 888 Mobile Hardware Development Kit - Rockchip RK3399: NanoPi R4S board - STM32MP1: Engicam MicroGEA STM32MP1 MicroDev 2.0 and SOM, EDIMM2.2 Starter Kit, Carrier, SOM - TI AM65: Siemens SIMATIC IOT2050 gateway There is notable work going into extending already supported machines and SoCs: - ASpeed AST2500 - Allwinner A23, A83t, A31, A64, H6 - Amlogic G12B - Broadcom BCM4908 - Marvell Armada 7K/8K/CN91xx - Mediatek MT6589, MT7622, MT8173, MT8183, MT8195 - NXP i.MX8Q, i.MX8MM, i.MX8MP - Qualcomm MSM8916, SC7180, SDM845, SDX55, SM8350 - Renesas R-Car M3, V3U - Rockchip RK3328, RK3399 - STEricsson U8500 - STMicroelectronics STM32MP141 - Samsung Exynos 4412 - TI K3-AM65, K3-J7200 - TI OMAP3 Among the treewide cleanups and bug fixes, two parts stand out: - There are a number of cleanups for issues pointed out by 'make dtbs_check' this time, and I expect more to come in the future as we increasingly check for regressions. - After a change to the MMC subsystem that can lead to unpredictable device numbers, several platforms add 'aliases' properties for these to give each MMC controller a fixed number" * tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (516 commits) dt-bindings: mali-bifrost: add dma-coherent arm64: dts: amlogic: misc DT schema fixups arm64: dts: qcom: sc7180: Update iommu property for simultaneous playback arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound model arm64: dts: qcom: sc7180: coachz: Add "dmic_clk_en" ARM: dts: mstar: Add a dts for M5Stack UnitV2 dt-bindings: arm: mstar: Add compatible for M5Stack UnitV2 dt-bindings: vendor-prefixes: Add vendor prefix for M5Stack arm64: dts: mt8183: fix dtbs_check warning arm64: dts: mt8183-pumpkin: fix dtbs_check warning ARM: dts: aspeed: tiogapass: add hotplug controller ARM: dts: aspeed: amd-ethanolx: Enable all used I2C busses ARM: dts: aspeed: Rainier: Update to pass 2 hardware ARM: dts: aspeed: Rainier 1S4U: Fix fan nodes ARM: dts: aspeed: Rainier: Fix humidity sensor bus address ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8 ARM: dts: qcom: sdx55: add IPA information ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55 dt-bindings: arm: qcom: Add binding for Thundercomm T55 kit ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLB ...
2021-04-07ARM: dts: at91: change the key code of the gpio keyLudovic Desroches
Having a button code and not a key code causes issues with libinput. udev won't set ID_INPUT_KEY. If it is forced, then it causes a bug within libinput. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210402130227.21478-1-nicolas.ferre@microchip.com
2021-03-10ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheetNicolas Ferre
Fix the whole mux-mask table according to datasheet for the sam9x60 product. Too much functions for pins were disabled leading to misunderstandings when enabling more peripherals or taking this table as an example for another board. Take advantage of this fix to move the mux-mask in the SoC file where it belongs and use lower case letters for hex numbers like everywhere in the file. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: <stable@vger.kernel.org> # 5.6+ Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210310152006.15018-1-nicolas.ferre@microchip.com
2021-03-10ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and CFederico Pellegrin
According to the datasheet PA7 can be set to either function A, B or C (see table 6-2 of DS60001579D). The previous value would permit just configuring with function C. Signed-off-by: Federico Pellegrin <fede@evolware.org> Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Cc: <stable@vger.kernel.org> # 5.6+ Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2020-12-03ARM: dts: at91: sam9x60ek: remove bypass propertyClaudiu Beznea
atmel,osc-bypass property sets the bit 1 at main oscillator register. On SAM9X60 this bit is not valid according to datasheet (chapter 28.16.9 PMC Clock Generator Main Oscillator Register). Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Marco Cardellini <marco.cardellini@microchip.com> Link: https://lore.kernel.org/r/1606903025-14197-2-git-send-email-claudiu.beznea@microchip.com
2020-11-24ARM: dts: at91: sam9x60: add pincontrol for USB HostCristian Birsan
The pincontrol node is needed for USB Host since Linux v5.7-rc1. Without it the driver probes but VBus is not powered because of wrong pincontrol configuration. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20201118120019.1257580-2-cristian.birsan@microchip.com
2020-09-24ARM: dts: at91: sam9x60ek: enable usb deviceCristian Birsan
Enable usb device for sam9x60ek board. Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Felipe Balbi <balbi@kernel.org>
2020-06-26ARM: dts: sam9x60: add rttClaudiu Beznea
Add RTT. Allong with it enable GBPR as it is requested by RTT. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1591779936-18577-4-git-send-email-claudiu.beznea@microchip.com
2020-06-17ARM: dts: at91: sam9x60ek: classd: pull-down the L1 and L3 linesCodrin Ciubotariu
The L1 and L3 lines drive NMOS transistors that are OFF with a low level. On the SAM9X60 EK board, if the pins corresponding to L1 and L3 have pull-ups enabled, there is an extra 2 x 30uA power consumption. Use pull-downs for these 2 lines to remove the unnecessary power consumption. Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for soc and board") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20200615095525.43414-2-codrin.ciubotariu@microchip.com
2020-04-13ARM: dts: at91: sam9x60ek: Add sdmmc1 nodeTudor Ambarus
sdmmc1 is not populated by default on sam9x60ek, but there are cases where it is populated with wilc3000. Add the node, but keep it disabled. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-4-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-04-13ARM: dts: at91: sam9x60ek: Use quad mode in the spi-nor flashTudor Ambarus
Both the QSPI controller and the sst26vf064b flash support quad mode, enable it. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200403061222.1277147-1-tudor.ambarus@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-03-09ARM: dts: at91: sam9x60ek: enable watchdog nodeEugen Hristev
Enable node for watchdog timer Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Link: https://lore.kernel.org/r/1581408369-14469-2-git-send-email-eugen.hristev@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2020-01-16ARM: dts: at91: sam9x60: add device tree for soc and boardSandeep Sheriker Mallikarjun
Add device tree files for SAM9X60 SoC and SAM9X60-EK board. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/1579085987-13976-6-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-05-14 11:54:20 +0000