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Diffstat (limited to 'arch/arm/boot/dts/omap3-n900.dts')
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts101
1 files changed, 33 insertions, 68 deletions
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index dd7971556449..f9f9eca0c56c 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -9,6 +9,7 @@
#include "omap34xx.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
+#include <dt-bindings/media/video-interfaces.h>
/*
* Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
@@ -49,7 +50,7 @@
leds {
compatible = "gpio-leds";
- heartbeat {
+ led-heartbeat {
label = "debug::sleep";
gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* 162 */
linux,default-trigger = "default-on";
@@ -156,7 +157,7 @@
io-channel-names = "temp", "bsi", "vbat";
};
- pwm9: dmtimer-pwm {
+ pwm9: pwm-9 {
compatible = "ti,omap-dmtimer-pwm";
#pwm-cells = <3>;
ti,timers = <&timer9>;
@@ -194,7 +195,7 @@
csi_isp: endpoint {
remote-endpoint = <&csi_cam1>;
- bus-type = <3>; /* CCP2 */
+ bus-type = <MEDIA_BUS_TYPE_CCP2>;
clock-lanes = <1>;
data-lanes = <0>;
lane-polarity = <0 0>;
@@ -236,27 +237,27 @@
pinctrl-single,pins = <
/* address lines */
- OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
- OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
- OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
+ OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0) /* gpmc_a1.gpmc_a1 */
+ OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0) /* gpmc_a2.gpmc_a2 */
+ OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0) /* gpmc_a3.gpmc_a3 */
/* data lines, gpmc_d0..d7 not muxable according to TRM */
- OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
- OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
- OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
- OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
- OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
- OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
- OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
- OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
+ OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0) /* gpmc_d8.gpmc_d8 */
+ OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0) /* gpmc_d9.gpmc_d9 */
+ OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0) /* gpmc_d10.gpmc_d10 */
+ OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0) /* gpmc_d11.gpmc_d11 */
+ OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0) /* gpmc_d12.gpmc_d12 */
+ OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0) /* gpmc_d13.gpmc_d13 */
+ OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0) /* gpmc_d14.gpmc_d14 */
+ OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0) /* gpmc_d15.gpmc_d15 */
/*
* gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
* according to TRM. OneNAND seems to require PIN_INPUT on clock.
*/
- OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
- OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
- >;
+ OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs1.gpmc_ncs1 */
+ OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */
+ >;
};
i2c1_pins: pinmux_i2c1_pins {
@@ -738,12 +739,12 @@
si4713: si4713@63 {
compatible = "silabs,si4713";
- reg = <0x63>;
+ reg = <0x63>;
- interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
- reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
- vio-supply = <&vio>;
- vdd-supply = <&vaux1>;
+ interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
+ reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
+ vio-supply = <&vio>;
+ vdd-supply = <&vaux1>;
};
bq24150a: bq24150a@6b {
@@ -767,56 +768,20 @@
clock-frequency = <400000>;
- lis302dl: lis3lv02d@1d {
- compatible = "st,lis3lv02d";
+ accelerometer@1d {
+ compatible = "st,lis302dl";
reg = <0x1d>;
- Vdd-supply = <&vaux1>;
- Vdd_IO-supply = <&vio>;
+ vdd-supply = <&vaux1>;
+ vddio-supply = <&vio>;
interrupt-parent = <&gpio6>;
- interrupts = <21 20>; /* 181 and 180 */
-
- /* click flags */
- st,click-single-x;
- st,click-single-y;
- st,click-single-z;
-
- /* Limits are 0.5g * value */
- st,click-threshold-x = <8>;
- st,click-threshold-y = <8>;
- st,click-threshold-z = <10>;
-
- /* Click must be longer than time limit */
- st,click-time-limit = <9>;
-
- /* Kind of debounce filter */
- st,click-latency = <50>;
-
- /* Interrupt line 2 for click detection */
- st,irq2-click;
-
- st,wakeup-x-hi;
- st,wakeup-y-hi;
- st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
-
- st,wakeup2-z-hi;
- st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
-
- st,hipass1-disable;
- st,hipass2-disable;
-
- st,axis-x = <1>; /* LIS3_DEV_X */
- st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
- st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
-
- st,min-limit-x = <(-32)>;
- st,min-limit-y = <3>;
- st,min-limit-z = <3>;
+ interrupts = <21 IRQ_TYPE_EDGE_RISING>,
+ <20 IRQ_TYPE_EDGE_RISING>; /* 181 and 180 */
- st,max-limit-x = <(-3)>;
- st,max-limit-y = <32>;
- st,max-limit-z = <32>;
+ mount-matrix = "-1", "0", "0",
+ "0", "1", "0",
+ "0", "0", "1";
};
cam1: camera@3e {
@@ -835,7 +800,7 @@
port {
csi_cam1: endpoint {
- bus-type = <3>; /* CCP2 */
+ bus-type = <MEDIA_BUS_TYPE_CCP2>;
strobe = <1>;
clock-inv = <0>;
crc = <1>;