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-rw-r--r--Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml31
1 files changed, 25 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
index 1ba687d433b1..bef109d163a8 100644
--- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
+++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml
@@ -31,11 +31,11 @@ properties:
clocks:
description: List of clock specifiers which are external input
clocks to the given clock controller.
- minItems: 3
+ minItems: 2
maxItems: 8
clock-names:
- minItems: 3
+ minItems: 2
maxItems: 8
required:
@@ -59,13 +59,11 @@ allOf:
clocks:
items:
- description: reference clock
- - description: alternate reference clock
- description: alternate reference clock for programmable logic
clock-names:
items:
- const: ref
- - const: alt_ref
- const: pl_alt_ref
- if:
@@ -73,6 +71,27 @@ allOf:
compatible:
contains:
enum:
+ - xlnx,versal-net-clk
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: reference clock
+ - description: alternate reference clock for programmable logic
+ - description: alternate reference clock
+
+ clock-names:
+ items:
+ - const: ref
+ - const: pl_alt_ref
+ - const: alt_ref
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
- xlnx,zynqmp-clk
then:
@@ -110,8 +129,8 @@ examples:
versal_clk: clock-controller {
#clock-cells = <1>;
compatible = "xlnx,versal-clk";
- clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>;
- clock-names = "ref", "alt_ref", "pl_alt_ref";
+ clocks = <&ref>, <&pl_alt_ref>;
+ clock-names = "ref", "pl_alt_ref";
};
};
};