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path: root/drivers/gpu/drm/i915/intel_ddi.c
AgeCommit message (Expand)Author
2016-08-11drm/i915: Fix iboost setting for SKL Y/U DP DDI buffer translation entry 2Ville Syrjälä
2016-08-11drm/i915: Program iboost settings for HDMI/DVI on SKLVille Syrjälä
2016-08-11drm/i915: Fix iboost setting for DDI with 4 lanes on SKLVille Syrjälä
2016-07-07drm/i915: s/INTEL_OUTPUT_DISPLAYPORT/INTEL_OUTPUT_DP/Ville Syrjälä
2016-07-07drm/i915: Kill has_dp_encoder from pipe_configVille Syrjälä
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson
2016-06-30drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson
2016-06-13drm/i915/bxt: Sanitiy check the PHY lane power down statusImre Deak
2016-06-13drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function prefixesImre Deak
2016-06-13drm/i915/bxt: Set DDI PHY lane latency optimization during modesetImre Deak
2016-06-13drm/i915/bxt: Move DDI PHY enabling/disabling to the power well codeImre Deak
2016-06-13drm/i915/bxt: Wait for PHY1 GRC calibration synchronouslyImre Deak
2016-05-30drm/i915: Give encoders useful namesVille Syrjälä
2016-05-13drm/i915: Remove intel_clock_t typedefAnder Conselvan de Oliveira
2016-05-09drm/i915: Enable/disable TMDS output buffers in DP++ adaptor as neededVille Syrjälä
2016-05-03Revert "drm/i915: start adding dp mst audio"Lyude
2016-04-29drm/i915: Set crtc_state->lane_count for HDMIAnder Conselvan de Oliveira
2016-04-22drm/i915/bxt: Force reprogramming a PHY with invalid HW stateImre Deak
2016-04-22drm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already enabledImre Deak
2016-04-22drm/i915/bxt: Use PHY0 GRC value for HW state verificationImre Deak
2016-04-20drm/i915: Fix eDP low vswing for BroadwellMika Kahola
2016-04-19drm/i915/ddi: Fix eDP VDD handling during booting and suspend/resumeImre Deak
2016-04-15drm/i915/bxt: Add HW state verification for DDI PHY and CDCLKImre Deak
2016-04-15drm/i915/bxt: Don't reprogram an already enabled DDI PHYImre Deak
2016-04-15drm/i915/bxt: Power down DDI PHYs separately during the per PHY uninitImre Deak
2016-04-15drm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK helpersImre Deak
2016-04-15drm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30 being read-onlyImre Deak
2016-04-04drm/i915/ddi: Silence compiler warning for unknown output typeChris Wilson
2016-04-01drm/i915: Disable FDI RX before DDI_BUF_CTLVille Syrjälä
2016-04-01drm/i915: use for_each_port_masked in bxt phy init for clarityJani Nikula
2016-04-01drm/i915: BXT DDI PHY sequence BUNVandana Kannan
2016-03-29drm/i915: move edp low vswing config to vbt dataJani Nikula
2016-03-29drm/i915: use a substruct in vbt data for edpJani Nikula
2016-03-21drm/i915/bxt: add dsi transcodersJani Nikula
2016-03-09drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll codeAnder Conselvan de Oliveira
2016-03-09drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interfaceAnder Conselvan de Oliveira
2016-03-09drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.cAnder Conselvan de Oliveira
2016-03-09drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira
2016-03-09drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira
2016-03-09drm/i915: Store a direct pointer to shared dpll in intel_crtc_stateAnder Conselvan de Oliveira
2016-03-09drm/i915: Move ddi shared dpll code to intel_dpll_mgr.cAnder Conselvan de Oliveira
2016-03-07drm/i915: Fix bogus dig_port_map[] assignment for pre-HSWTakashi Iwai
2016-02-17drm/i915/ddi: Ensure the HW is powered during HW state readoutImre Deak
2016-02-09drm/i915/skl: Explicitly check for eDP in skl_ddi_pll_select()Lyude
2016-02-09drm/i915/skl: Don't skip mst encoders in skl_ddi_pll_select()Lyude
2016-02-02drm/i915: Check DDI max lanes after applying BXT workaroundMatt Roper
2016-01-18Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter
2016-01-12drm/i915: Only complain about n_edp_entries with eDP portsVille Syrjälä
2016-01-12drm/i915: Kill intel_prepare_ddi()Ville Syrjälä
2016-01-12drm/i915: Reject >9 ddi translation entried if port != A/E on SKLVille Syrjälä
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