| Age | Commit message (Collapse) | Author |
|---|
|
Commit 97f2645f358b ("tree-wide: replace config_enabled() with
IS_ENABLED()") mostly killed config_enabled(), but some new users have
appeared for v4.8-rc1. They are all used for a boolean option, so can
be replaced with IS_ENABLED() safely.
Link: http://lkml.kernel.org/r/1471970749-24867-1-git-send-email-yamada.masahiro@socionext.com
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Kees Cook <keescook@chromium.org>
Acked-by: Peter Oberparleiter <oberpar@linux.vnet.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
|
Use CPHYSADDR to implement the __pa macro converting from a virtual to a
physical address for MIPS32, much as is already done for MIPS64 (though
without the complication of having both compatibility & XKPHYS
segments).
This allows for __pa to work regardless of whether the address being
translated is in kseg0 or kseg1, unlike the previous subtraction based
approach which only worked for addresses in kseg0. Working for kseg1
addresses is important if __pa is used on addresses allocated by
dma_alloc_coherent, where on systems with non-coherent I/O we provide
addresses in kseg1. If this address is then used with
dma_map_single_attrs then it is provided to virt_to_page, which in turn
calls virt_to_phys which is a wrapper around __pa. The result is that we
end up with a physical address 0x20000000 bytes (ie. the size of kseg0)
too high.
In addition to providing consistency with MIPS64 & fixing the kseg1 case
above this has the added bonus of generating smaller code for systems
implementing MIPS32r2 & beyond, where a single ext instruction can
extract the physical address rather than needing to load an immediate
into a temp register & subtract it. This results in ~1.3KB savings for a
boston_defconfig kernel adjusted to set CONFIG_32BIT=y.
This patch does not change the EVA case, which may or may not have
similar issues around handling both cached & uncached addresses but is
beyond the scope of this patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13836/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
The stack and heap have both been executable by default on MIPS until
now. This patch changes the default to be non-executable, but only for
ELF binaries with a non-executable PT_GNU_STACK header present. This
does apply to both the heap & the stack, despite the name PT_GNU_STACK,
and this matches the behaviour of other architectures like ARM & x86.
Current MIPS toolchains do not produce the PT_GNU_STACK header, which
means that we can rely upon this patch not changing the behaviour of
existing binaries. The new default will only take effect for newly
compiled binaries once toolchains are updated to support PT_GNU_STACK,
and since those binaries are newly compiled they can be compiled
expecting the change in default behaviour. Again this matches the way in
which the ARM & x86 architectures handled their implementations of
non-executable memory.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
Cc: Maciej Rozycki <maciej.rozycki@imgtec.com>
Cc: Faraz Shahbazker <faraz.shahbazker@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: Matthew Fortune <matthew.fortune@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13765/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
This reverts commit 22b14523994588279ae9c5ccfe64073c1e5b3c00.
It was originally sent in an earlier revision of the pfn_t patchset.
Besides being broken, the warning is also fixed by PFN_FLAGS_MASK
casting the PAGE_MASK to an unsigned long.
Reported-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Cc: linux-kernel@vger.kernel.org
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12182/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
./arch/mips/include/asm/page.h:204:13: warning: comparison of unsigned expression >= 0 is always true [-Wtype-limits]
The default value of ARCH_PFN_OFFSET is 0 thus triggering this warning
for all platforms using the default value.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Make PAGE_MASK an unsigned long, like it is on x86, to avoid:
In file included from arch/mips/kernel/asm-offsets.c:14:0:
include/linux/mm.h: In function '__pfn_to_pfn_t':
include/linux/mm.h:1050:2: warning: left shift count >= width of type
pfn_t pfn_t = { .val = pfn | (flags & PFN_FLAGS_MASK), };
...where PFN_FLAGS_MASK is:
#define PFN_FLAGS_MASK (~PAGE_MASK << (BITS_PER_LONG - PAGE_SHIFT))
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Cc: ross.zwisler@linux.intel.com
Cc: hch@lst.de
Cc: linux-mips@linux-mips.org
Cc: linux-nvdimm@lists.01.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mm@kvack.org
Patchwork: https://patchwork.linux-mips.org/patch/11280/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
MIPS architecture code does not provide copy_user_page,
so it should not provide a prototype for it either.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9266/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Compiling mm/highmem.c gives a warning: passing argument 1 of
'virt_to_phys' makes pointer from integer without a cast
Fixed by casting to void*
Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7337/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Jiri Kosina <trivial@kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7573/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
This will allow platforms to use an alternative way to get
the physical address of a symbol.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
|
|
The Fixed Page Size TLB (FTLB) is a set-associative dual entry TLB. Its
purpose is to reduce the number of TLB misses by increasing the effective
TLB size and keep the implementation complexity to minimum levels.
A supported core can have both VTLB and FTLB.
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6139/
|
|
This reverts commit 3f4579252aa166641861a64f1c2883365ca126c2. It is
invalid because the macros CAC_ADDR and UNCAC_ADDR have a kernel
virtual address as an argument and also returns a kernel virtual
address. Using and physical address PHYS_OFFSET is blatantly wrong
for a macro common to multiple platforms.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5528/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
This fixes:
MODPOST 393 modules
ERROR: "min_low_pfn" [arch/mips/kvm/kvm.ko] undefined!
make[3]: *** [__modpost] Error 1
It would have been possible to just export min_low_pfn but in the end
pfn_valid should return 1 for any pfn argument for which a struct page
exists so using min_low_pfn was wrong anyway.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
As reported:
This problem was discovered when doing BGP traffic with the TCP MD5 option
activated, where the following call chain caused a crash:
* tcp_v4_rcv
* tcp_v4_timewait_ack
* tcp_v4_send_ack -> follow stack variable rep.th
* tcp_v4_md5_hash_hdr
* tcp_md5_hash_header
* sg_init_one
* sg_set_buf
* virt_to_page
I noticed that tcp_v4_send_reset uses a similar stack variable and
also calls tcp_v4_md5_hash_hdr, so it has the same problem.
The networking core can indirectly call virt_to_phys() on stack
addresses, if this is done from PID 0, the stack will usually be in
CKSEG0, so virt_to_phys() needs to work there as well
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Jiang Liu <liuj97@gmail.com>
Cc: eunb.song@samsung.com
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5220/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
This reverts commit c17a6554782ad531f4713b33fd6339ba67ef6391.
Manuel Lauss writes:
lmo commit c17a6554 (MIPS: page.h: Provide more readable definition for
PAGE_MASK) apparently breaks ioremap of 36-bit addresses on my Alchemy
systems (PCI and PCMCIA) The reason is that in arch/mips/mm/ioremap.c
line 157 (phys_addr &= PAGE_MASK) bits 32-35 are cut off. Seems the
new PAGE_MASK is explicitly 32bit, or one could make it signed instead
of unsigned long.
|
|
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
ERROR: "min_low_pfn" [drivers/block/aoe/aoe.ko] undefined!
Fixed by moving the implementation of virt_addr_valid() into the kernel
proper and exporting it which removes the pains of an inline or macro
implementation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
We need Huge TLBs for HUGETLB_PAGE, or the soon to follow
TRANSPARENT_HUGEPAGE. collect this information under a single Kconfig
symbol.
Signed-off-by: David Daney <david.daney@cavium.com>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
When flushing TLB, if @vma is backed by huge page, we could flush huge
TLB, due to that huge page is defined to be far from normal page.
Signed-off-by: Hillf Danton <dhillf@gmail.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: "Jayachandran C." <jayachandranc@netlogicmicro.com>
Patchwork: https://patchwork.linux-mips.org/patch/2825/
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Hillf Danton <dhillf@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/3114/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
On AR7, we already redefine PHYS_OFFSET to match the system specifities, it
is however not sufficient when unsing dma_{map,unmap}_single, specifically
in the ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA
to work correctly. This patch fixes the following issue, seen in cpmac_open:
ops[#1]:
Cpu 0
$ 0 : 00000000 10008400 a0f5b120 00000000
$ 4 : 94c59000 94270f64 00000020 00000010
$ 8 : 00000010 94103ce0 0000000a 94c03400
$12 : ffffffff 94c03408 94c03410 00000001
$16 : a0f5ba20 00000041 94c592c0 94c59200
$20 : 94c59000 000005ee 00002000 9438c8f0
$24 : 00000010 00000000
$28 : 94fac000 94fadd58 94390000 942724a8
Hi : 00000000
Lo : 00000001
epc : 94272518 cpmac_open+0x208/0x3f8
Not tainted
ra : 942724a8 cpmac_open+0x198/0x3f8
Status: 10008403 KERNEL EXL IE
Cause : 3080000c
BadVA : 00000000
PrId : 00018448 (MIPS 4KEc)
Modules linked in:
Process ifconfig (pid: 278, threadinfo=94fac000, task=94e79590, tls=00000000)
Stack : 7f8da120 2ab05cb0 94c59000 943356f0 00000000 943d0000 94c59000 943356f0
94c59030 943d0000 943c27c0 94fade10 00000000 94fade20 94c59000 9428e5a4
00000000 94c59000 00000041 94289768 94c59000 00000041 00001002 00001043
00000000 9428d810 00000000 94fade10 7f8da4e8 9428e6b8 00000000 7f8da4a8
7f8da4e8 00008914 00000000 942f7f2c 00000000 00000008 00408000 00008913
...
Call Trace:
[<94272518>] cpmac_open+0x208/0x3f8
[<9428e5a4>] dev_open+0x164/0x264
[<9428d810>] dev_change_flags+0xd0/0x1bc
[<942f7f2c>] devinet_ioctl+0x2d8/0x908
[<942771f8>] sock_ioctl+0x29c/0x2fc
[<941a0fb4>] vfs_ioctl+0x2c/0x7c
[<941a16ec>] do_vfs_ioctl+0x5dc/0x630
[<941a1790>] sys_ioctl+0x50/0x88
[<94101e10>] stack_done+0x20/0x3c
Signed-off-by: peter fuerst <post@pfrst.de>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1050/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
For 64-bit kernels with 64KB pages and two level page tables, there are
42 bits worth of virtual address space This is larger than the 40 bits of
virtual address space obtained with the default 4KB Page size and three
levels, so there are no draw backs for using two level tables with this
configuration.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
page.h includes ifndef __ASSEMBLY__ guards, but PAGE_SIZE and some other
constants are defined using "1UL", which the assembler does not support.
Use the _AC macro from const.h to make them available to assembly (and
linker scripts).
Signed-off-by: Nelson Elhage <nelhage@ksplice.com>
Signed-off-by: Tim Abbott <tabbott@ksplice.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
This patch fixes warnings like this:
CC fs/proc/meminfo.o
In file included from /work/linux/include/linux/mmzone.h:20,
from /work/linux/include/linux/gfp.h:4,
from /work/linux/include/linux/mm.h:8,
from /work/linux/fs/proc/meminfo.c:5:
/work/linux/arch/mips/include/asm/page.h:36:1: warning: "HPAGE_SIZE" redefined
In file included from /work/linux/fs/proc/meminfo.c:2:
/work/linux/include/linux/hugetlb.h:107:1: warning: this is the location of the previous definition
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
For systems which do not define PHYS_OFFSET as 0 pfn_valid() may falsely
have returned 0 on most configurations. Bug introduced by commit
752fbeb2e3555c0d236e992f1195fd7ce30e728d (linux-mips.org) rsp.
6f284a2ce7b8bc49cb8455b1763357897a899abb (kernel.org) titled "[MIPS]
FLATMEM: introduce PHYS_OFFSET."
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
The current asm-generic/page.h only contains the get_order
function, and asm-generic/uaccess.h only implements
unaligned accesses. This renames the file to getorder.h
and uaccess-unaligned.h to make room for new page.h
and uaccess.h file that will be usable by all simple
(e.g. nommu) architectures.
Signed-off-by: Remis Lima Baima <remis.developer@googlemail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
|
Beyond the requirements of the architecture standard Cavium also supports
8k and 32k pages.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: David Daney <ddaney@caviumnetworks.com>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
Masahiro Yamada
Paul Burton
Dan Williams
Ralf Baechle
Guenter Roeck
Zubair Lutfullah Kakakhel
Geert Uytterhoeven
Leonid Yegoshin
David Daney
Hillf Danton
Florian Fainelli
David Daney
Nelson Elhage
Atsushi Nemoto
Arnd Bergmann