diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4029-drm-amdgpu-work-around-llvm-bug-42576.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4029-drm-amdgpu-work-around-llvm-bug-42576.patch | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4029-drm-amdgpu-work-around-llvm-bug-42576.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4029-drm-amdgpu-work-around-llvm-bug-42576.patch new file mode 100644 index 00000000..f4772ba3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4029-drm-amdgpu-work-around-llvm-bug-42576.patch @@ -0,0 +1,36 @@ +From 44d1b0c79da2839e225acd43f07e57a07e73f224 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann <arnd@arndb.de> +Date: Wed, 2 Oct 2019 14:01:27 +0200 +Subject: [PATCH 4029/4256] drm/amdgpu: work around llvm bug #42576 + +Code in the amdgpu driver triggers a bug when using clang to build +an arm64 kernel: + +/tmp/sdma_v4_0-f95fd3.s: Assembler messages: +/tmp/sdma_v4_0-f95fd3.s:44: Error: selected processor does not support `bfc w0,#1,#5' + +I expect this to be fixed in llvm soon, but we can also work around +it by inserting a barrier() that prevents the optimization. + +Link: https://bugs.llvm.org/show_bug.cgi?id=42576 +Signed-off-by: Arnd Bergmann <arnd@arndb.de> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +index cf784a4caa24..26f13de35b2c 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -958,6 +958,7 @@ static uint32_t sdma_v4_0_rb_cntl(struct amdgpu_ring *ring, uint32_t rb_cntl) + /* Set ring buffer size in dwords */ + uint32_t rb_bufsz = order_base_2(ring->ring_size / 4); + ++ barrier(); /* work around https://bugs.llvm.org/show_bug.cgi?id=42576 */ + rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SIZE, rb_bufsz); + #ifdef __BIG_ENDIAN + rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_GFX_RB_CNTL, RB_SWAP_ENABLE, 1); +-- +2.17.1 + |