diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3908-drm-amd-powerplay-Add-mode2-mode-for-GPU-RESET-in-SM.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3908-drm-amd-powerplay-Add-mode2-mode-for-GPU-RESET-in-SM.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3908-drm-amd-powerplay-Add-mode2-mode-for-GPU-RESET-in-SM.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3908-drm-amd-powerplay-Add-mode2-mode-for-GPU-RESET-in-SM.patch new file mode 100644 index 00000000..66cc5eff --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3908-drm-amd-powerplay-Add-mode2-mode-for-GPU-RESET-in-SM.patch @@ -0,0 +1,75 @@ +From ff05a3bd676f34783d452dab5af4f1715b93bc38 Mon Sep 17 00:00:00 2001 +From: chen gong <curry.gong@amd.com> +Date: Mon, 23 Sep 2019 14:56:43 +0800 +Subject: [PATCH 3908/4256] drm/amd/powerplay: Add mode2 mode for GPU RESET in + SMU + +Renoir need to use mode2 mode to implement GPU RESET + +Signed-off-by: chen gong <curry.gong@amd.com> +Reviewed-by: Aaron Liu <aaron.liu@amd.com> +--- + drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 10 ++++++++++ + drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 4 ++++ + 2 files changed, 14 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index 45da21dc2356..149de9277f8e 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -321,6 +321,13 @@ struct mclock_latency_table { + struct mclk_latency_entries entries[MAX_REGULAR_DPM_NUM]; + }; + ++enum smu_reset_mode ++{ ++ SMU_RESET_MODE_0, ++ SMU_RESET_MODE_1, ++ SMU_RESET_MODE_2, ++}; ++ + enum smu_baco_state + { + SMU_BACO_STATE_ENTER = 0, +@@ -537,6 +544,7 @@ struct smu_funcs + enum smu_baco_state (*baco_get_state)(struct smu_context *smu); + int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state); + int (*baco_reset)(struct smu_context *smu); ++ int (*mode2_reset)(struct smu_context *smu); + int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max); + }; + +@@ -760,6 +768,8 @@ struct smu_funcs + ((smu)->funcs->baco_get_state? (smu)->funcs->baco_get_state((smu), (state)) : 0) + #define smu_baco_reset(smu) \ + ((smu)->funcs->baco_reset? (smu)->funcs->baco_reset((smu)) : 0) ++#define smu_mode2_reset(smu) \ ++ ((smu)->funcs->mode2_reset? (smu)->funcs->mode2_reset((smu)) : 0) + #define smu_asic_set_performance_level(smu, level) \ + ((smu)->ppt_funcs->set_performance_level? (smu)->ppt_funcs->set_performance_level((smu), (level)) : -EINVAL); + #define smu_dump_pptable(smu) \ +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +index 24274c9bb87d..d9d947375557 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +@@ -380,6 +380,9 @@ static int smu_v12_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk + return ret; + } + ++static int smu_v12_0_mode2_reset(struct smu_context *smu){ ++ return smu_v12_0_send_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset, SMU_RESET_MODE_2); ++} + static const struct smu_funcs smu_v12_0_funcs = { + .check_fw_status = smu_v12_0_check_fw_status, + .check_fw_version = smu_v12_0_check_fw_version, +@@ -394,6 +397,7 @@ static const struct smu_funcs smu_v12_0_funcs = { + .fini_smc_tables = smu_v12_0_fini_smc_tables, + .populate_smc_tables = smu_v12_0_populate_smc_tables, + .get_dpm_ultimate_freq = smu_v12_0_get_dpm_ultimate_freq, ++ .mode2_reset = smu_v12_0_mode2_reset, + }; + + void smu_v12_0_set_smu_funcs(struct smu_context *smu) +-- +2.17.1 + |