diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3671-drm-amd-powerplay-do-proper-cleanups-on-hw_fini.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3671-drm-amd-powerplay-do-proper-cleanups-on-hw_fini.patch | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3671-drm-amd-powerplay-do-proper-cleanups-on-hw_fini.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3671-drm-amd-powerplay-do-proper-cleanups-on-hw_fini.patch new file mode 100644 index 00000000..eca95798 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3671-drm-amd-powerplay-do-proper-cleanups-on-hw_fini.patch @@ -0,0 +1,103 @@ +From 4b1bd2bb6cbd46393e84812c01bad445f2226aa3 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 2 Sep 2019 12:37:23 +0800 +Subject: [PATCH 3671/4256] drm/amd/powerplay: do proper cleanups on hw_fini + +These are needed for smu_reset support. + +Change-Id: If29ede4b99758adb08fd4e16665f44fd893ec99b +Signed-off-by: Evan Quan <evan.quan@amd.com> +Reviewed-by: Jack Gui <Jack.Gui@amd.com> +--- + drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 17 +++++++++++++++++ + drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 3 +++ + drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 10 ++++++++++ + 3 files changed, 30 insertions(+) + +diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +index 7c5ab9139d0e..e53ea7b9e8f9 100644 +--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c ++++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c +@@ -1278,6 +1278,11 @@ static int smu_hw_init(void *handle) + return ret; + } + ++static int smu_stop_dpms(struct smu_context *smu) ++{ ++ return smu_send_smc_msg(smu, SMU_MSG_DisableAllSmuFeatures); ++} ++ + static int smu_hw_fini(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; +@@ -1290,6 +1295,18 @@ static int smu_hw_fini(void *handle) + smu_powergate_vcn(&adev->smu, true); + } + ++ ret = smu_stop_thermal_control(smu); ++ if (ret) { ++ pr_warn("Fail to stop thermal control!\n"); ++ return ret; ++ } ++ ++ ret = smu_stop_dpms(smu); ++ if (ret) { ++ pr_warn("Fail to stop Dpms!\n"); ++ return ret; ++ } ++ + kfree(table_context->driver_pptable); + table_context->driver_pptable = NULL; + +diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +index e9b99355bd88..e1237ea8844c 100644 +--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h ++++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +@@ -497,6 +497,7 @@ struct smu_funcs + int (*get_current_clk_freq)(struct smu_context *smu, enum smu_clk_type clk_id, uint32_t *value); + int (*init_max_sustainable_clocks)(struct smu_context *smu); + int (*start_thermal_control)(struct smu_context *smu); ++ int (*stop_thermal_control)(struct smu_context *smu); + int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor, + void *data, uint32_t *size); + int (*set_deep_sleep_dcefclk)(struct smu_context *smu, uint32_t clk); +@@ -646,6 +647,8 @@ struct smu_funcs + ((smu)->ppt_funcs->set_thermal_fan_table ? (smu)->ppt_funcs->set_thermal_fan_table((smu)) : 0) + #define smu_start_thermal_control(smu) \ + ((smu)->funcs->start_thermal_control? (smu)->funcs->start_thermal_control((smu)) : 0) ++#define smu_stop_thermal_control(smu) \ ++ ((smu)->funcs->stop_thermal_control? (smu)->funcs->stop_thermal_control((smu)) : 0) + #define smu_read_sensor(smu, sensor, data, size) \ + ((smu)->ppt_funcs->read_sensor? (smu)->ppt_funcs->read_sensor((smu), (sensor), (data), (size)) : 0) + #define smu_smc_read_sensor(smu, sensor, data, size) \ +diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +index e85f0c8c5dd7..022b5c8672a1 100644 +--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c ++++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +@@ -1211,6 +1211,15 @@ static int smu_v11_0_start_thermal_control(struct smu_context *smu) + return ret; + } + ++static int smu_v11_0_stop_thermal_control(struct smu_context *smu) ++{ ++ struct amdgpu_device *adev = smu->adev; ++ ++ WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0); ++ ++ return 0; ++} ++ + static uint16_t convert_to_vddc(uint8_t vid) + { + return (uint16_t) ((6200 - (vid * 25)) / SMU11_VOLTAGE_SCALE); +@@ -1785,6 +1794,7 @@ static const struct smu_funcs smu_v11_0_funcs = { + .get_current_clk_freq = smu_v11_0_get_current_clk_freq, + .init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks, + .start_thermal_control = smu_v11_0_start_thermal_control, ++ .stop_thermal_control = smu_v11_0_stop_thermal_control, + .read_sensor = smu_v11_0_read_sensor, + .set_deep_sleep_dcefclk = smu_v11_0_set_deep_sleep_dcefclk, + .display_clock_voltage_request = smu_v11_0_display_clock_voltage_request, +-- +2.17.1 + |