diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3604-drm-amd-powerplay-correct-Vega20-dpm-level-related-s.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3604-drm-amd-powerplay-correct-Vega20-dpm-level-related-s.patch | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3604-drm-amd-powerplay-correct-Vega20-dpm-level-related-s.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3604-drm-amd-powerplay-correct-Vega20-dpm-level-related-s.patch new file mode 100644 index 00000000..2420eaae --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3604-drm-amd-powerplay-correct-Vega20-dpm-level-related-s.patch @@ -0,0 +1,118 @@ +From 4a27f10ef0743e5d526c864dad5b9e0c3978be97 Mon Sep 17 00:00:00 2001 +From: Evan Quan <evan.quan@amd.com> +Date: Mon, 19 Aug 2019 13:17:53 +0800 +Subject: [PATCH 3604/4256] drm/amd/powerplay: correct Vega20 dpm level related + settings + +Correct the settings for auto mode and skip the unnecessary +settings for dcefclk and fclk. + +Change-Id: I7e6ca75ce86b4d5cd44920a9fbc71b6f36ea3c49 +Signed-off-by: Evan Quan <evan.quan@amd.com> +Acked-by: Alex Deucher <alexander.deucher@amd.com> +--- + .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 60 +++++++++++++++++-- + 1 file changed, 54 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +index 98a6f5305974..2f45c624ea5d 100644 +--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c ++++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c +@@ -2353,12 +2353,16 @@ static int vega20_force_dpm_highest(struct pp_hwmgr *hwmgr) + data->dpm_table.soc_table.dpm_state.soft_max_level = + data->dpm_table.soc_table.dpm_levels[soft_level].value; + +- ret = vega20_upload_dpm_min_level(hwmgr, 0xFFFFFFFF); ++ ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | ++ FEATURE_DPM_UCLK_MASK | ++ FEATURE_DPM_SOCCLK_MASK); + PP_ASSERT_WITH_CODE(!ret, + "Failed to upload boot level to highest!", + return ret); + +- ret = vega20_upload_dpm_max_level(hwmgr, 0xFFFFFFFF); ++ ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | ++ FEATURE_DPM_UCLK_MASK | ++ FEATURE_DPM_SOCCLK_MASK); + PP_ASSERT_WITH_CODE(!ret, + "Failed to upload dpm max level to highest!", + return ret); +@@ -2391,12 +2395,16 @@ static int vega20_force_dpm_lowest(struct pp_hwmgr *hwmgr) + data->dpm_table.soc_table.dpm_state.soft_max_level = + data->dpm_table.soc_table.dpm_levels[soft_level].value; + +- ret = vega20_upload_dpm_min_level(hwmgr, 0xFFFFFFFF); ++ ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | ++ FEATURE_DPM_UCLK_MASK | ++ FEATURE_DPM_SOCCLK_MASK); + PP_ASSERT_WITH_CODE(!ret, + "Failed to upload boot level to highest!", + return ret); + +- ret = vega20_upload_dpm_max_level(hwmgr, 0xFFFFFFFF); ++ ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | ++ FEATURE_DPM_UCLK_MASK | ++ FEATURE_DPM_SOCCLK_MASK); + PP_ASSERT_WITH_CODE(!ret, + "Failed to upload dpm max level to highest!", + return ret); +@@ -2407,14 +2415,54 @@ static int vega20_force_dpm_lowest(struct pp_hwmgr *hwmgr) + + static int vega20_unforce_dpm_levels(struct pp_hwmgr *hwmgr) + { ++ struct vega20_hwmgr *data = ++ (struct vega20_hwmgr *)(hwmgr->backend); ++ uint32_t soft_min_level, soft_max_level; + int ret = 0; + +- ret = vega20_upload_dpm_min_level(hwmgr, 0xFFFFFFFF); ++ /* gfxclk soft min/max settings */ ++ soft_min_level = ++ vega20_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); ++ soft_max_level = ++ vega20_find_highest_dpm_level(&(data->dpm_table.gfx_table)); ++ ++ data->dpm_table.gfx_table.dpm_state.soft_min_level = ++ data->dpm_table.gfx_table.dpm_levels[soft_min_level].value; ++ data->dpm_table.gfx_table.dpm_state.soft_max_level = ++ data->dpm_table.gfx_table.dpm_levels[soft_max_level].value; ++ ++ /* uclk soft min/max settings */ ++ soft_min_level = ++ vega20_find_lowest_dpm_level(&(data->dpm_table.mem_table)); ++ soft_max_level = ++ vega20_find_highest_dpm_level(&(data->dpm_table.mem_table)); ++ ++ data->dpm_table.mem_table.dpm_state.soft_min_level = ++ data->dpm_table.mem_table.dpm_levels[soft_min_level].value; ++ data->dpm_table.mem_table.dpm_state.soft_max_level = ++ data->dpm_table.mem_table.dpm_levels[soft_max_level].value; ++ ++ /* socclk soft min/max settings */ ++ soft_min_level = ++ vega20_find_lowest_dpm_level(&(data->dpm_table.soc_table)); ++ soft_max_level = ++ vega20_find_highest_dpm_level(&(data->dpm_table.soc_table)); ++ ++ data->dpm_table.soc_table.dpm_state.soft_min_level = ++ data->dpm_table.soc_table.dpm_levels[soft_min_level].value; ++ data->dpm_table.soc_table.dpm_state.soft_max_level = ++ data->dpm_table.soc_table.dpm_levels[soft_max_level].value; ++ ++ ret = vega20_upload_dpm_min_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | ++ FEATURE_DPM_UCLK_MASK | ++ FEATURE_DPM_SOCCLK_MASK); + PP_ASSERT_WITH_CODE(!ret, + "Failed to upload DPM Bootup Levels!", + return ret); + +- ret = vega20_upload_dpm_max_level(hwmgr, 0xFFFFFFFF); ++ ret = vega20_upload_dpm_max_level(hwmgr, FEATURE_DPM_GFXCLK_MASK | ++ FEATURE_DPM_UCLK_MASK | ++ FEATURE_DPM_SOCCLK_MASK); + PP_ASSERT_WITH_CODE(!ret, + "Failed to upload DPM Max Levels!", + return ret); +-- +2.17.1 + |