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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3463-drm-amdgpu-Use-new-mode2-reset-interface-for-RV.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3463-drm-amdgpu-Use-new-mode2-reset-interface-for-RV.patch76
1 files changed, 76 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3463-drm-amdgpu-Use-new-mode2-reset-interface-for-RV.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3463-drm-amdgpu-Use-new-mode2-reset-interface-for-RV.patch
new file mode 100644
index 00000000..54a59cd3
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3463-drm-amdgpu-Use-new-mode2-reset-interface-for-RV.patch
@@ -0,0 +1,76 @@
+From 36201e2c16c04fc7419b964c53ad5ff29b7185ec Mon Sep 17 00:00:00 2001
+From: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
+Date: Fri, 26 Jul 2019 14:07:42 -0400
+Subject: [PATCH 3463/4256] drm/amdgpu: Use new mode2 reset interface for RV.
+
+Integrate the mode2 reset into rest sequence.
+
+v2:
+Check ppfuncs pointer for NULL
+
+Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Evan Quan <evan.quan@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 25 +++++++++++++++-------
+ 2 files changed, 18 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+index 80904cb6bccc..ba49073131d0 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+@@ -3510,6 +3510,7 @@ bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev)
+ case CHIP_VEGA20:
+ case CHIP_VEGA10:
+ case CHIP_VEGA12:
++ case CHIP_RAVEN:
+ break;
+ default:
+ goto disabled;
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
+index c2d324d8da75..77e679920c1c 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -508,6 +508,15 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
+ return 0;
+ }
+
++static int soc15_mode2_reset(struct amdgpu_device *adev)
++{
++ if (!adev->powerplay.pp_funcs ||
++ !adev->powerplay.pp_funcs->asic_reset_mode_2)
++ return -ENOENT;
++
++ return adev->powerplay.pp_funcs->asic_reset_mode_2(adev->powerplay.pp_handle);
++}
++
+ static enum amd_reset_method
+ soc15_asic_reset_method(struct amdgpu_device *adev)
+ {
+@@ -546,14 +555,14 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
+
+ static int soc15_asic_reset(struct amdgpu_device *adev)
+ {
+- int ret;
+-
+- if (soc15_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)
+- ret = soc15_asic_baco_reset(adev);
+- else
+- ret = soc15_asic_mode1_reset(adev);
+-
+- return ret;
++ switch (soc15_asic_reset_method(adev)) {
++ case AMD_RESET_METHOD_BACO:
++ return soc15_asic_baco_reset(adev);
++ case AMD_RESET_METHOD_MODE2:
++ return soc15_mode2_reset(adev);
++ default:
++ return soc15_asic_mode1_reset(adev);
++ }
+ }
+
+ /*static int soc15_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
+--
+2.17.1
+