diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3255-drm-amdgpu-replace-AMDGPU_RAS_UE-with-AMDGPU_RAS_SUC.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3255-drm-amdgpu-replace-AMDGPU_RAS_UE-with-AMDGPU_RAS_SUC.patch | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3255-drm-amdgpu-replace-AMDGPU_RAS_UE-with-AMDGPU_RAS_SUC.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3255-drm-amdgpu-replace-AMDGPU_RAS_UE-with-AMDGPU_RAS_SUC.patch new file mode 100644 index 00000000..1c7d4482 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3255-drm-amdgpu-replace-AMDGPU_RAS_UE-with-AMDGPU_RAS_SUC.patch @@ -0,0 +1,75 @@ +From 8162f784baf1b1f5aaae1d25b75726ff6bc5df37 Mon Sep 17 00:00:00 2001 +From: Tao Zhou <tao.zhou1@amd.com> +Date: Thu, 1 Aug 2019 17:30:35 +0800 +Subject: [PATCH 3255/4256] drm/amdgpu: replace AMDGPU_RAS_UE with + AMDGPU_RAS_SUCCESS + +ce can also trigger interrupt, and even both ce and ue error can be +found in one ras query, distinguishing between ce and ue in interrupt +handler is uncessary. + +Signed-off-by: Tao Zhou <tao.zhou1@amd.com> +Suggested-by: Guchun Chen <guchun.chen@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +- + 4 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +index 4a0dc5269ddf..d2e8a85f6e38 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +@@ -1046,7 +1046,7 @@ static void amdgpu_ras_interrupt_handler(struct ras_manager *obj) + * But leave IP do that recovery, here we just dispatch + * the error. + */ +- if (ret == AMDGPU_RAS_UE) { ++ if (ret == AMDGPU_RAS_SUCCESS) { + /* these counts could be left as 0 if + * some blocks do not count error number + */ +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index 51de6268c177..6168d1df31d7 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -5661,7 +5661,7 @@ static int gfx_v9_0_process_ras_data_cb(struct amdgpu_device *adev, + if (adev->gfx.funcs->query_ras_error_count) + adev->gfx.funcs->query_ras_error_count(adev, err_data); + amdgpu_ras_reset_gpu(adev, 0); +- return AMDGPU_RAS_UE; ++ return AMDGPU_RAS_SUCCESS; + } + + static const struct { +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index fd23d9081286..41c4f6fea273 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -255,7 +255,7 @@ static int gmc_v9_0_process_ras_data_cb(struct amdgpu_device *adev, + if (err_data->ue_count) + amdgpu_ras_reset_gpu(adev, 0); + +- return AMDGPU_RAS_UE; ++ return AMDGPU_RAS_SUCCESS; + } + + static int gmc_v9_0_process_ecc_irq(struct amdgpu_device *adev, +diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +index efbb6f22fefc..3cfef19aadd2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -1984,7 +1984,7 @@ static int sdma_v4_0_process_ras_data_cb(struct amdgpu_device *adev, + + amdgpu_ras_reset_gpu(adev, 0); + +- return AMDGPU_RAS_UE; ++ return AMDGPU_RAS_SUCCESS; + } + + static int sdma_v4_0_process_ecc_irq(struct amdgpu_device *adev, +-- +2.17.1 + |