diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3064-drm-amd-display-Add-MPC-3DLUT-resource-management.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3064-drm-amd-display-Add-MPC-3DLUT-resource-management.patch | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3064-drm-amd-display-Add-MPC-3DLUT-resource-management.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3064-drm-amd-display-Add-MPC-3DLUT-resource-management.patch new file mode 100644 index 00000000..f67b6741 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3064-drm-amd-display-Add-MPC-3DLUT-resource-management.patch @@ -0,0 +1,98 @@ +From abbab24a6e8856277dc8d53c2de73a3aa6e279b9 Mon Sep 17 00:00:00 2001 +From: Vitaly Prosyak <vitaly.prosyak@amd.com> +Date: Fri, 21 Jun 2019 10:13:16 -0500 +Subject: [PATCH 3064/4256] drm/amd/display: Add MPC 3DLUT resource management + +[Why & How] +Number of 3DLUT's in MPC are not equal to number of pipes. +Resource management is required. +Activate on FPGA entire tm solution which includes +the following :hdr multiplier, shaper, 3dlut. + +Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> +Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> +Acked-by: Gary Kattan <Gary.Kattan@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 3 +-- + drivers/gpu/drm/amd/display/dc/dc.h | 16 +++++++++++++++- + .../gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++-- + 3 files changed, 18 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +index 394a87981614..9184f877f537 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +@@ -58,7 +58,6 @@ static void construct(struct dc_context *ctx, struct dc_plane_state *plane_state + plane_state->lut3d_func = dc_create_3dlut_func(); + if (plane_state->lut3d_func != NULL) { + plane_state->lut3d_func->ctx = ctx; +- plane_state->lut3d_func->initialized = false; + } + plane_state->blend_tf = dc_create_transfer_func(); + if (plane_state->blend_tf != NULL) { +@@ -277,7 +276,7 @@ struct dc_3dlut *dc_create_3dlut_func(void) + goto alloc_fail; + + kref_init(&lut->refcount); +- lut->initialized = false; ++ lut->state.raw = 0; + + return lut; + +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index 6d69fd12e422..d0ff9c5bf332 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -630,12 +630,26 @@ struct dc_transfer_func { + + #if defined(CONFIG_DRM_AMD_DC_DCN2_0) + ++union dc_3dlut_state { ++ struct { ++ uint32_t initialized:1; /*if 3dlut is went through color module for initialization */ ++ uint32_t rmu_idx_valid:1; /*if mux settings are valid*/ ++ uint32_t rmu_mux_num:3; /*index of mux to use*/ ++ uint32_t mpc_rmu0_mux:4; /*select mpcc on mux, one of the following : mpcc0, mpcc1, mpcc2, mpcc3*/ ++ uint32_t mpc_rmu1_mux:4; ++ uint32_t mpc_rmu2_mux:4; ++ uint32_t reserved:15; ++ } bits; ++ uint32_t raw; ++}; ++ + + struct dc_3dlut { + struct kref refcount; + struct tetrahedral_params lut_3d; + uint32_t hdr_multiplier; +- bool initialized; ++ bool initialized; /*remove after diag fix*/ ++ union dc_3dlut_state state; + struct dc_context *ctx; + }; + #endif +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +index b089ba1c7614..23cbc72f71c8 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +@@ -929,14 +929,14 @@ static bool dcn20_set_shaper_3dlut( + + result = dpp_base->funcs->dpp_program_shaper_lut(dpp_base, shaper_lut); + if (plane_state->lut3d_func && +- plane_state->lut3d_func->initialized == true) ++ plane_state->lut3d_func->state.bits.initialized == 1) + result = dpp_base->funcs->dpp_program_3dlut(dpp_base, + &plane_state->lut3d_func->lut_3d); + else + result = dpp_base->funcs->dpp_program_3dlut(dpp_base, NULL); + + if (plane_state->lut3d_func && +- plane_state->lut3d_func->initialized == true && ++ plane_state->lut3d_func->state.bits.initialized == 1 && + plane_state->lut3d_func->hdr_multiplier != 0) + dpp_base->funcs->dpp_set_hdr_multiplier(dpp_base, + plane_state->lut3d_func->hdr_multiplier); +-- +2.17.1 + |