1 files changed, 45 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3036-drm-amd-display-dc-fix-TRANSMITTER_UNIPHY_G-offset.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3036-drm-amd-display-dc-fix-TRANSMITTER_UNIPHY_G-offset.patch
new file mode 100644
index 00000000..3cd43abf
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3036-drm-amd-display-dc-fix-TRANSMITTER_UNIPHY_G-offset.patch
@@ -0,0 +1,45 @@
+From 0846da24b527a02c016678f8199ea56f3a4c78fb Mon Sep 17 00:00:00 2001
+From: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
+Date: Mon, 19 Aug 2019 16:29:45 +0530
+Subject: [PATCH 3036/4256] drm/amd/display/dc: fix TRANSMITTER_UNIPHY_G offset
+
+[why?]
+The enum value for TRANSMITTER_UNIPHY_G is 9 but in dce80_resoruce.c
+UNIPHY_G registers are initialized at index 6. This is because in
+dce11 there are other TRANSMITTER initialized at 6, 7 and 8.
+
+[how?]
+Initialize dummy elemets for 6, 7 and 8 so that at index 9 UNIPHY_G
+registers are available.
+
+Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+index 1dccd59c59c5..69e9325e0f74 100644
+--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+@@ -226,7 +226,7 @@ static const struct dce110_link_enc_hpd_registers link_enc_hpd_regs[] = {
+ };
+ 
+ #define link_regs(id)\
+-[id] = {\
++{\
+ 	LE_DCE80_REG_LIST(id)\
+ }
+ 
+@@ -237,6 +237,9 @@ static const struct dce110_link_enc_registers link_enc_regs[] = {
+ 	link_regs(3),
+ 	link_regs(4),
+ 	link_regs(5),
++	link_regs(0),
++	link_regs(0),
++	link_regs(0),
+ 	link_regs(6),
+ };
+ 
+-- 
+2.17.1
+