1 files changed, 38 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3009-drm-amd-display-initialize-p_state-to-proper-value.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3009-drm-amd-display-initialize-p_state-to-proper-value.patch
new file mode 100644
index 00000000..5875599b
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3009-drm-amd-display-initialize-p_state-to-proper-value.patch
@@ -0,0 +1,38 @@
+From b4d0759597dff75d37e96d8cc8548cfaf2eef474 Mon Sep 17 00:00:00 2001
+From: Jun Lei <Jun.Lei@amd.com>
+Date: Fri, 31 May 2019 15:14:13 -0400
+Subject: [PATCH 3009/4256] drm/amd/display: initialize p_state to proper value
+
+[why]
+On some modes SMU will be in infinite loop state at boot, this is
+because driver assumes p_state_support is false, but this is the
+opposite of the assumed boot state by SMU.  we optimize away
+notifying SMU about no pstate, and so they will get stuck
+
+[how]
+when we init clk manager, init pstate to true, so it matches driver load
+assumption
+
+Signed-off-by: Jun Lei <Jun.Lei@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Leo Li <sunpeng.li@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+index 08a774fc7b67..740f5db22bb5 100644
+--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+@@ -301,6 +301,8 @@ void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr,
+ void dcn2_init_clocks(struct clk_mgr *clk_mgr)
+ {
+ 	memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks));
++	// Assumption is that boot state always supports pstate
++	clk_mgr->clks.p_state_change_support = true;
+ }
+ 
+ void dcn2_enable_pme_wa(struct clk_mgr *clk_mgr_base)
+-- 
+2.17.1
+