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-rw-r--r--meta/recipes-devtools/gcc/gcc-4.6.0.inc4
-rw-r--r--meta/recipes-devtools/gcc/gcc-4.6.0/volatile_access_backport.patch28
2 files changed, 31 insertions, 1 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-4.6.0.inc b/meta/recipes-devtools/gcc/gcc-4.6.0.inc
index fb5c70db90..cb9eb8e703 100644
--- a/meta/recipes-devtools/gcc/gcc-4.6.0.inc
+++ b/meta/recipes-devtools/gcc/gcc-4.6.0.inc
@@ -7,7 +7,7 @@ require gcc-common.inc
require gcc-4_6-branch-backports.inc
-PR = "r2"
+PR = "r3"
DEPENDS =+ "mpfr gmp libmpc"
NATIVEDEPS = "mpfr-native gmp-native gettext-native libmpc-native"
@@ -53,7 +53,9 @@ SRC_URI = "${GNU_MIRROR}/gcc/gcc-${PV}/gcc-${PV}.tar.bz2 \
file://gcc-poison-parameters.patch \
file://GPLUSPLUS_INCLUDE_DIR_with_sysroot.patch \
file://COLLECT_GCC_OPTIONS.patch \
+ file://volatile_access_backport.patch \
"
+
SRC_URI_append_sh3 = " file://sh3-installfix-fixheaders.patch;patch=1 "
SRC_URI[md5sum] = "93d1c436bf991564524701259b6285a2"
diff --git a/meta/recipes-devtools/gcc/gcc-4.6.0/volatile_access_backport.patch b/meta/recipes-devtools/gcc/gcc-4.6.0/volatile_access_backport.patch
new file mode 100644
index 0000000000..9c8681728d
--- /dev/null
+++ b/meta/recipes-devtools/gcc/gcc-4.6.0/volatile_access_backport.patch
@@ -0,0 +1,28 @@
+Pulled from http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01477.html
+
+Upstream-Status: Backport
+
+Signed-off-by: Saul Wold <sgw@linux.intel.com>
+
+ gcc/
+ * expr.c (expand_expr_real_1): Only use BLKmode for volatile
+ accesses which are not naturally aligned.
+
+Index: gcc-4.6.0/gcc/expr.c
+===================================================================
+--- gcc-4.6.0.orig/gcc/expr.c 2011-06-01 15:28:55.000000000 -0700
++++ gcc-4.6.0/gcc/expr.c 2011-06-01 15:41:17.154848182 -0700
+@@ -9178,8 +9178,11 @@
+ && modifier != EXPAND_CONST_ADDRESS
+ && modifier != EXPAND_INITIALIZER)
+ /* If the field is volatile, we always want an aligned
+- access. */
+- || (volatilep && flag_strict_volatile_bitfields > 0)
++ access. Only do this if the access is not already naturally
++ aligned, otherwise "normal" (non-bitfield) volatile fields
++ become non-addressable. */
++ || (volatilep && flag_strict_volatile_bitfields > 0
++ && (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
+ /* If the field isn't aligned enough to fetch as a memref,
+ fetch it as a bit field. */
+ || (mode1 != BLKmode