aboutsummaryrefslogtreecommitdiffstats
path: root/meta-xilinx-bsp/recipes-microblaze/binutils/binutils-2.32/0024-Fixed-the-bug-in-the-R_MICROBLAZE_64_NONE-relocation.patch
blob: a4f8257d2a856e16cf3ad7200c37fc5fcb60d54b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
From ed3e6fad3e2a626fc987e9c7477f51d03d2b4512 Mon Sep 17 00:00:00 2001
From: Nagaraju Mekala <nmekala@xilix.com>
Date: Wed, 28 Nov 2018 14:00:29 +0530
Subject: [PATCH] Fixed the bug in the R_MICROBLAZE_64_NONE relocation. It was
 adjusting only lower 16bits.

Signed-off-by: Mahesh Bodapati <mbodapat@xilinx.com>
Signed-off-by: Nagaraju Mekala <nagaraju.mekala@xilinx.com>

---
 bfd/elf32-microblaze.c | 4 ++--
 bfd/elf64-microblaze.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
index 035e71f..2d8c062 100644
--- a/bfd/elf32-microblaze.c
+++ b/bfd/elf32-microblaze.c
@@ -2022,8 +2022,8 @@ microblaze_elf_relax_section (bfd *abfd,
 		sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
 		efix = calc_fixup (target_address, 0, sec);
 		irel->r_addend -= (efix - sfix);
-    microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
-				       + INST_WORD_SIZE, irel->r_addend);
+    microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
+                                       irel->r_addend);
 	      }
 	      break;
 	    }
diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
index 184b7d5..ef6a870 100644
--- a/bfd/elf64-microblaze.c
+++ b/bfd/elf64-microblaze.c
@@ -2017,8 +2017,8 @@ microblaze_elf_relax_section (bfd *abfd,
 		sfix = calc_fixup (irel->r_offset + INST_WORD_SIZE, 0, sec);
 		efix = calc_fixup (target_address, 0, sec);
 		irel->r_addend -= (efix - sfix);
-    microblaze_bfd_write_imm_value_32 (abfd, contents + irel->r_offset
-                                       + INST_WORD_SIZE, irel->r_addend);
+    microblaze_bfd_write_imm_value_64 (abfd, contents + irel->r_offset,
+                                       irel->r_addend);
 	      }
 	      break;
 	    }