From c1e8a1419e8f5d18e7135fb4fe3bf21941125008 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Sat, 26 Aug 2017 19:21:24 -0700 Subject: [PATCH] Fix atomic side effects. In atomic_compare_and_swapsi, add side effects to prevent incorrect assumptions during optimization. Previously, the outputs were considered unused; this generated assembly code with undefined side effects after invocation of the atomic. Signed-off-by: Kirk Meyer Signed-off-by: David Holsgrove Signed-off-by: Mahesh Bodapati Signed-off-by: Manjukumar Matha Upstream-Status: Pending --- gcc/config/microblaze/microblaze.md | 3 +++ gcc/config/microblaze/sync.md | 21 +++++++++++++-------- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md index 8a372d7ebb..59d629b559 100644 --- a/gcc/config/microblaze/microblaze.md +++ b/gcc/config/microblaze/microblaze.md @@ -41,6 +41,9 @@ (UNSPEC_CMP 104) ;; signed compare (UNSPEC_CMPU 105) ;; unsigned compare (UNSPEC_TLS 106) ;; jump table + (UNSPECV_CAS_BOOL 201) ;; compare and swap (bool) + (UNSPECV_CAS_VAL 202) ;; compare and swap (val) + (UNSPECV_CAS_MEM 203) ;; compare and swap (mem) ]) (define_c_enum "unspec" [ diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md index 8125bd8d63..edf4bdd811 100644 --- a/gcc/config/microblaze/sync.md +++ b/gcc/config/microblaze/sync.md @@ -18,14 +18,19 @@ ;; . (define_insn "atomic_compare_and_swapsi" - [(match_operand:SI 0 "register_operand" "=&d") ;; bool output - (match_operand:SI 1 "register_operand" "=&d") ;; val output - (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory - (match_operand:SI 3 "register_operand" "d") ;; expected value - (match_operand:SI 4 "register_operand" "d") ;; desired value - (match_operand:SI 5 "const_int_operand" "") ;; is_weak - (match_operand:SI 6 "const_int_operand" "") ;; mod_s - (match_operand:SI 7 "const_int_operand" "") ;; mod_f + [(set (match_operand:SI 0 "register_operand" "=&d") ;; bool output + (unspec_volatile:SI + [(match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory + (match_operand:SI 3 "register_operand" "d") ;; expected value + (match_operand:SI 4 "register_operand" "d")] ;; desired value + UNSPECV_CAS_BOOL)) + (set (match_operand:SI 1 "register_operand" "=&d") ;; val output + (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_VAL)) + (set (match_dup 2) + (unspec_volatile:SI [(const_int 0)] UNSPECV_CAS_MEM)) + (match_operand:SI 5 "const_int_operand" "") ;; is_weak + (match_operand:SI 6 "const_int_operand" "") ;; mod_s + (match_operand:SI 7 "const_int_operand" "") ;; mod_f (clobber (match_scratch:SI 8 "=&d"))] "" { -- 2.14.2