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authorNathan Rossi <nathan.rossi@xilinx.com>2015-04-17 11:18:22 +1000
committerNathan Rossi <nathan.rossi@xilinx.com>2015-04-24 13:36:50 +1000
commiteab360db54841bb39453abb9af1c7181b344498b (patch)
treee58888f8b4e6dd5bdf9bf0accdc88c8efa962fb7
parented8a8cf0057d34788609c864c9936cee32a7a5ca (diff)
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qemuzynq: Add fixed-clock to device tree for ethernet
* Add a fixed 125 MHz clock to trick the ethernet driver into thinking the reference clock is at the correct frequency * This masks the 'macb e000b000.ps7-ethernet eth0: unable to generate target frequency: 125000000 Hz' message from the macb driver Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
-rw-r--r--conf/machine/boards/qemu/qemuzynq-base.dtsi9
1 files changed, 8 insertions, 1 deletions
diff --git a/conf/machine/boards/qemu/qemuzynq-base.dtsi b/conf/machine/boards/qemu/qemuzynq-base.dtsi
index 3914510d..a2f06657 100644
--- a/conf/machine/boards/qemu/qemuzynq-base.dtsi
+++ b/conf/machine/boards/qemu/qemuzynq-base.dtsi
@@ -9,7 +9,14 @@
reg = <0x0 0x40000000>;
} ;
ps7_axi_interconnect_0: amba@0 {
+ /* Setup a fixed 125 MHz clock to trick the ethernet driver */
+ clk125mhz: clock {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ } ;
ps7_ethernet_0: ps7-ethernet@e000b000 {
+ clocks = <&clkc 30>, <&clkc 30>, <&clk125mhz>, <&clk125mhz>, <&clkc 30>;
phy-handle = <&phy0>;
phy-mode = "gmii";
mdio {
@@ -49,7 +56,7 @@
};
} ;
} ;
-
+
/* Disabled Devices */
ps7_gpio_0: ps7-gpio@e000a000 { compatible = "invalid"; };
ps7_uart_0: serial@e0000000 { compatible = "invalid"; };