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authorHari Nagalla <hnagalla@ti.com>2021-11-01 15:33:12 -0400
committerYogesh Siraswar <yogeshs@ti.com>2021-11-11 19:05:55 +0000
commit15326435dd3e6cc474bc2dc6b410095b58a6626d (patch)
treeb291396ab1dbfe1cb131cf9be0b4fb94802c8289
parentcac1d81b98a0a54cef0fde90d114e623a1e7eb45 (diff)
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ti-rtos-firmware: Update M4F binary for AM64x SoCs
AM64x SoCs have a Cortex-M4F core in MCU domain. This core is used a standalone device for safety applications. For non safety applications, the device is exposed as a remote processor with Linux rpmsg framework. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Yogesh Siraswar <yogeshs@ti.com> Signed-off-by: Denys Dmytriyenko <denys@konsulko.com> Signed-off-by: Yogesh Siraswar <yogeshs@ti.com>
-rw-r--r--recipes-ti/ti-rtos-bin/ti-rtos-firmware.bb6
1 files changed, 6 insertions, 0 deletions
diff --git a/recipes-ti/ti-rtos-bin/ti-rtos-firmware.bb b/recipes-ti/ti-rtos-bin/ti-rtos-firmware.bb
index 079be84b..1248c9e2 100644
--- a/recipes-ti/ti-rtos-bin/ti-rtos-firmware.bb
+++ b/recipes-ti/ti-rtos-bin/ti-rtos-firmware.bb
@@ -62,6 +62,7 @@ do_install:prepend:am64xx() {
mv am64-main-r5f0_1-fw ipc_echo_baremetal_test_mcu1_1_release_strip.xer5f; \
mv am64-main-r5f1_0-fw ipc_echo_baremetal_test_mcu2_0_release_strip.xer5f; \
mv am64-main-r5f1_1-fw ipc_echo_baremetal_test_mcu2_1_release_strip.xer5f; \
+ mv am64-mcu-m4f0_0-fw ipc_echo_baremetal_test_mcu3_0_release_strip.xer5f; \
)
}
@@ -111,6 +112,7 @@ do_install:am64xx() {
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu1_1_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu2_0_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu2_1_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
+ install -m 0644 ${RTOS_IPC_FW_DIR}/ipc_echo_baremetal_test_mcu3_0_release_strip.xer5f ${LEGACY_IPC_FW_DIR}
}
# Set up names for the firmwares
@@ -124,6 +126,7 @@ ALTERNATIVE:${PN}:am64xx = "\
am64-main-r5f0_1-fw \
am64-main-r5f1_0-fw \
am64-main-r5f1_1-fw \
+ am64-mcu-m4f0_0-fw \
"
ALTERNATIVE:${PN}:j7 = "\
@@ -154,6 +157,7 @@ TARGET_MAIN_R5FSS0_0:am64xx = "am64-main-r5f0_0-fw"
TARGET_MAIN_R5FSS0_1:am64xx = "am64-main-r5f0_1-fw"
TARGET_MAIN_R5FSS1_0:am64xx = "am64-main-r5f1_0-fw"
TARGET_MAIN_R5FSS1_1:am64xx = "am64-main-r5f1_1-fw"
+TARGET_MCU_M4FSS0_0:am64xx = "am64-mcu-m4f0_0-fw"
TARGET_MCU_R5FSS0_0:j7 = "j7-mcu-r5f0_0-fw"
TARGET_MCU_R5FSS0_1:j7 = "j7-mcu-r5f0_1-fw"
@@ -177,6 +181,7 @@ ALTERNATIVE_LINK_NAME[am64-main-r5f0_0-fw] = "${base_libdir}/firmware/${TARGET_M
ALTERNATIVE_LINK_NAME[am64-main-r5f0_1-fw] = "${base_libdir}/firmware/${TARGET_MAIN_R5FSS0_1}"
ALTERNATIVE_LINK_NAME[am64-main-r5f1_0-fw] = "${base_libdir}/firmware/${TARGET_MAIN_R5FSS1_0}"
ALTERNATIVE_LINK_NAME[am64-main-r5f1_1-fw] = "${base_libdir}/firmware/${TARGET_MAIN_R5FSS1_1}"
+ALTERNATIVE_LINK_NAME[am64-mcu-m4f0_0-fw] = "${base_libdir}/firmware/${TARGET_MCU_M4FSS0_0}"
ALTERNATIVE_LINK_NAME[j7-mcu-r5f0_0-fw] = "${base_libdir}/firmware/${TARGET_MCU_R5FSS0_0}"
ALTERNATIVE_LINK_NAME[j7-mcu-r5f0_1-fw] = "${base_libdir}/firmware/${TARGET_MCU_R5FSS0_1}"
@@ -202,6 +207,7 @@ ALTERNATIVE_TARGET[am64-main-r5f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_e
ALTERNATIVE_TARGET[am64-main-r5f0_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu1_1_release_strip.xer5f"
ALTERNATIVE_TARGET[am64-main-r5f1_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu2_0_release_strip.xer5f"
ALTERNATIVE_TARGET[am64-main-r5f1_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu2_1_release_strip.xer5f"
+ALTERNATIVE_TARGET[am64-mcu-m4f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_baremetal_test_mcu3_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j7-mcu-r5f0_0-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_testb_mcu1_0_release_strip.xer5f"
ALTERNATIVE_TARGET[j7-mcu-r5f0_1-fw] = "${base_libdir}/firmware/pdk-ipc/ipc_echo_test_mcu1_1_release_strip.xer5f"