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-rw-r--r--recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch1427
1 files changed, 1427 insertions, 0 deletions
diff --git a/recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch b/recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch
new file mode 100644
index 00000000..b6db2de2
--- /dev/null
+++ b/recipes-extended/testfloat/files/SoftFloat-powerpc-1.patch
@@ -0,0 +1,1427 @@
+This patch adds PowerPC support in SoftFloat.
+
+Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
+Signed-off-by: Liu Yu <Yu.Liu@freescale.com>
+---
+ SoftFloat-2b/processors/powerpc-GCC.h | 87 ++++
+ SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile | 26 ++
+ SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h | 55 +++
+ .../bits32/powerpc-GCC/softfloat-specialize | 252 ++++++++++++
+ .../softfloat/bits32/powerpc-GCC/softfloat.h | 155 +++++++
+ SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile | 24 ++
+ SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h | 55 +++
+ .../bits64/powerpc-GCC/softfloat-specialize | 422 ++++++++++++++++++++
+ .../softfloat/bits64/powerpc-GCC/softfloat.h | 269 +++++++++++++
+ 9 files changed, 1345 insertions(+), 0 deletions(-)
+ create mode 100644 SoftFloat-2b/processors/powerpc-GCC.h
+ create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile
+ create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h
+ create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize
+ create mode 100644 SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h
+ create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile
+ create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h
+ create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize
+ create mode 100644 SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h
+
+diff --git a/SoftFloat-2b/processors/powerpc-GCC.h b/SoftFloat-2b/processors/powerpc-GCC.h
+new file mode 100644
+index 0000000..002a786
+--- /dev/null
++++ b/SoftFloat-2b/processors/powerpc-GCC.h
+@@ -0,0 +1,87 @@
++/*
++ * This file is derived from processors/386-gcc.h,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ *
++ * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++ * been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++ * RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++ * AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++ * COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++ * EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++ * INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++ * OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++ */
++
++/*----------------------------------------------------------------------------
++| One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
++*----------------------------------------------------------------------------*/
++#define BIGENDIAN
++
++/*----------------------------------------------------------------------------
++| The macro `BITS64' can be defined to indicate that 64-bit integer types are
++| supported by the compiler.
++*----------------------------------------------------------------------------*/
++#define BITS32
++
++/*----------------------------------------------------------------------------
++| Each of the following `typedef's defines the most convenient type that holds
++| integers of at least as many bits as specified. For example, `uint8' should
++| be the most convenient type that can hold unsigned integers of as many as
++| 8 bits. The `flag' type must be able to hold either a 0 or 1. For most
++| implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
++| to the same as `int'.
++*----------------------------------------------------------------------------*/
++typedef int flag;
++typedef int uint8;
++typedef int int8;
++typedef int uint16;
++typedef int int16;
++typedef unsigned int uint32;
++typedef signed int int32;
++#ifdef BITS64
++typedef unsigned long long int uint64;
++typedef signed long long int int64;
++#endif
++
++/*----------------------------------------------------------------------------
++| Each of the following `typedef's defines a type that holds integers
++| of _exactly_ the number of bits specified. For instance, for most
++| implementation of C, `bits16' and `sbits16' should be `typedef'ed to
++| `unsigned short int' and `signed short int' (or `short int'), respectively.
++*----------------------------------------------------------------------------*/
++typedef unsigned char bits8;
++typedef signed char sbits8;
++typedef unsigned short int bits16;
++typedef signed short int sbits16;
++typedef unsigned int bits32;
++typedef signed int sbits32;
++#ifdef BITS64
++typedef unsigned long long int bits64;
++typedef signed long long int sbits64;
++#endif
++
++#ifdef BITS64
++/*----------------------------------------------------------------------------
++| The `LIT64' macro takes as its argument a textual integer literal and
++| if necessary ``marks'' the literal as having a 64-bit integer type.
++| For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
++| appended with the letters `LL' standing for `long long', which is `gcc's
++| name for the 64-bit integer type. Some compilers may allow `LIT64' to be
++| defined as the identity macro: `#define LIT64( a ) a'.
++*----------------------------------------------------------------------------*/
++#define LIT64( a ) a##LL
++#endif
++
++/*----------------------------------------------------------------------------
++| The macro `INLINE' can be used before functions that should be inlined. If
++| a compiler does not support explicit inlining, this macro should be defined
++| to be `static'.
++*----------------------------------------------------------------------------*/
++#define INLINE extern inline
++
+diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile
+new file mode 100644
+index 0000000..28f1e33
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/Makefile
+@@ -0,0 +1,26 @@
++
++PROCESSOR_H = ../../../processors/powerpc-GCC.h
++SOFTFLOAT_MACROS = ../softfloat-macros
++
++OBJ = .o
++EXE =
++INCLUDES = -I. -I..
++COMPILE_C = $(COMPILE_PREFIX)gcc -msoft-float -c -o $@ $(INCLUDES) -I- -O2
++LINK = $(COMPILE_PREFIX)gcc -o $@
++
++ALL: softfloat$(OBJ) timesoftfloat$(EXE)
++
++milieu.h: $(PROCESSOR_H)
++ touch milieu.h
++
++softfloat$(OBJ): milieu.h softfloat.h softfloat-specialize $(SOFTFLOAT_MACROS) ../softfloat.c
++ $(COMPILE_C) ../softfloat.c
++
++timesoftfloat$(OBJ): milieu.h softfloat.h ../timesoftfloat.c
++ $(COMPILE_C) ../timesoftfloat.c
++
++timesoftfloat$(EXE): softfloat$(OBJ) timesoftfloat$(OBJ)
++ $(LINK) softfloat$(OBJ) timesoftfloat$(OBJ)
++
++clean:
++ rm -f *.o timesoftfloat$(EXE)
+diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h
+new file mode 100644
+index 0000000..d8b6012
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/milieu.h
+@@ -0,0 +1,55 @@
++/*
++ * This file is derived from softfloat/bits32/386-Win32-GCC/milieu.h,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ */
++
++/*============================================================================
++
++This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
++Package, Release 2b.
++
++Written by John R. Hauser. This work was made possible in part by the
++International Computer Science Institute, located at Suite 600, 1947 Center
++Street, Berkeley, California 94704. Funding was partially provided by the
++National Science Foundation under grant MIP-9311980. The original version
++of this code was written as part of a project to build a fixed-point vector
++processor in collaboration with the University of California at Berkeley,
++overseen by Profs. Nelson Morgan and John Wawrzynek. More information
++is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
++arithmetic/SoftFloat.html'.
++
++THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++
++Derivative works are acceptable, even for commercial purposes, so long as
++(1) the source code for the derivative work includes prominent notice that
++the work is derivative, and (2) the source code includes prominent notice with
++these four paragraphs for those parts of this code that are retained.
++
++=============================================================================*/
++
++/*----------------------------------------------------------------------------
++| Include common integer types and flags.
++*----------------------------------------------------------------------------*/
++#include "../../../processors/powerpc-GCC.h"
++
++/*----------------------------------------------------------------------------
++| Symbolic Boolean literals.
++*----------------------------------------------------------------------------*/
++enum {
++ FALSE = 0,
++ TRUE = 1
++};
++
+diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize
+new file mode 100644
+index 0000000..fd2caa4
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat-specialize
+@@ -0,0 +1,252 @@
++/*
++ * This file is derived from softfloat/bits32/386-Win32-GCC/softfloat-specialize,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ */
++
++/*============================================================================
++
++This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
++Arithmetic Package, Release 2b.
++
++Written by John R. Hauser. This work was made possible in part by the
++International Computer Science Institute, located at Suite 600, 1947 Center
++Street, Berkeley, California 94704. Funding was partially provided by the
++National Science Foundation under grant MIP-9311980. The original version
++of this code was written as part of a project to build a fixed-point vector
++processor in collaboration with the University of California at Berkeley,
++overseen by Profs. Nelson Morgan and John Wawrzynek. More information
++is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
++arithmetic/SoftFloat.html'.
++
++THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++
++Derivative works are acceptable, even for commercial purposes, so long as
++(1) the source code for the derivative work includes prominent notice that
++the work is derivative, and (2) the source code includes prominent notice with
++these four paragraphs for those parts of this code that are retained.
++
++=============================================================================*/
++
++/*----------------------------------------------------------------------------
++| Underflow tininess-detection mode, statically initialized to default value.
++| (The declaration in `softfloat.h' must match the `int8' type here.)
++*----------------------------------------------------------------------------*/
++int8 float_detect_tininess = float_tininess_after_rounding;
++
++/*----------------------------------------------------------------------------
++| Raises the exceptions specified by `flags'. Floating-point traps can be
++| defined here if desired. It is currently not possible for such a trap
++| to substitute a result value. If traps are not implemented, this routine
++| should be simply `float_exception_flags |= flags;'.
++*----------------------------------------------------------------------------*/
++
++void float_raise( int8 flags )
++{
++
++ float_exception_flags |= flags;
++
++}
++
++/*----------------------------------------------------------------------------
++| Internal canonical NaN format.
++*----------------------------------------------------------------------------*/
++typedef struct {
++ flag sign;
++ bits32 high, low;
++} commonNaNT;
++
++/*----------------------------------------------------------------------------
++| The pattern for a default generated single-precision NaN.
++*----------------------------------------------------------------------------*/
++enum {
++ float32_default_nan = 0xFFFFFFFF
++};
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the single-precision floating-point value `a' is a NaN;
++| otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float32_is_nan( float32 a )
++{
++
++ return ( 0xFF000000 < (bits32) ( a<<1 ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the single-precision floating-point value `a' is a signaling
++| NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float32_is_signaling_nan( float32 a )
++{
++
++ return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the single-precision floating-point NaN
++| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
++| exception is raised.
++*----------------------------------------------------------------------------*/
++
++static commonNaNT float32ToCommonNaN( float32 a )
++{
++ commonNaNT z;
++
++ if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
++ z.sign = a>>31;
++ z.low = 0;
++ z.high = a<<9;
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the canonical NaN `a' to the single-
++| precision floating-point format.
++*----------------------------------------------------------------------------*/
++
++static float32 commonNaNToFloat32( commonNaNT a )
++{
++
++ return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>9 );
++
++}
++
++/*----------------------------------------------------------------------------
++| Takes two single-precision floating-point values `a' and `b', one of which
++| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
++| signaling NaN, the invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static float32 propagateFloat32NaN( float32 a, float32 b )
++{
++ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
++
++ aIsNaN = float32_is_nan( a );
++ aIsSignalingNaN = float32_is_signaling_nan( a );
++ bIsNaN = float32_is_nan( b );
++ bIsSignalingNaN = float32_is_signaling_nan( b );
++ a |= 0x00400000;
++ b |= 0x00400000;
++ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
++ if ( aIsNaN ) {
++ return ( aIsSignalingNaN & bIsNaN ) ? b : a;
++ }
++ else {
++ return b;
++ }
++
++}
++
++/*----------------------------------------------------------------------------
++| The pattern for a default generated double-precision NaN. The `high' and
++| `low' values hold the most- and least-significant bits, respectively.
++*----------------------------------------------------------------------------*/
++enum {
++ float64_default_nan_high = 0xFFFFFFFF,
++ float64_default_nan_low = 0xFFFFFFFF
++};
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the double-precision floating-point value `a' is a NaN;
++| otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float64_is_nan( float64 a )
++{
++
++ return
++ ( 0xFFE00000 <= (bits32) ( a.high<<1 ) )
++ && ( a.low || ( a.high & 0x000FFFFF ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the double-precision floating-point value `a' is a signaling
++| NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float64_is_signaling_nan( float64 a )
++{
++
++ return
++ ( ( ( a.high>>19 ) & 0xFFF ) == 0xFFE )
++ && ( a.low || ( a.high & 0x0007FFFF ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the double-precision floating-point NaN
++| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
++| exception is raised.
++*----------------------------------------------------------------------------*/
++
++static commonNaNT float64ToCommonNaN( float64 a )
++{
++ commonNaNT z;
++
++ if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
++ z.sign = a.high>>31;
++ shortShift64Left( a.high, a.low, 12, &z.high, &z.low );
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the canonical NaN `a' to the double-
++| precision floating-point format.
++*----------------------------------------------------------------------------*/
++
++static float64 commonNaNToFloat64( commonNaNT a )
++{
++ float64 z;
++
++ shift64Right( a.high, a.low, 12, &z.high, &z.low );
++ z.high |= ( ( (bits32) a.sign )<<31 ) | 0x7FF80000;
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Takes two double-precision floating-point values `a' and `b', one of which
++| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
++| signaling NaN, the invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static float64 propagateFloat64NaN( float64 a, float64 b )
++{
++ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
++
++ aIsNaN = float64_is_nan( a );
++ aIsSignalingNaN = float64_is_signaling_nan( a );
++ bIsNaN = float64_is_nan( b );
++ bIsSignalingNaN = float64_is_signaling_nan( b );
++ a.high |= 0x00080000;
++ b.high |= 0x00080000;
++ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
++ if ( aIsNaN ) {
++ return ( aIsSignalingNaN & bIsNaN ) ? b : a;
++ }
++ else {
++ return b;
++ }
++
++}
++
+diff --git a/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h
+new file mode 100644
+index 0000000..0015b8e
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits32/powerpc-GCC/softfloat.h
+@@ -0,0 +1,155 @@
++/*
++ * This file is derived from softfloat/bits32/386-Win32-GCC/softfloat.h,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ */
++
++/*============================================================================
++
++This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
++Package, Release 2b.
++
++Written by John R. Hauser. This work was made possible in part by the
++International Computer Science Institute, located at Suite 600, 1947 Center
++Street, Berkeley, California 94704. Funding was partially provided by the
++National Science Foundation under grant MIP-9311980. The original version
++of this code was written as part of a project to build a fixed-point vector
++processor in collaboration with the University of California at Berkeley,
++overseen by Profs. Nelson Morgan and John Wawrzynek. More information
++is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
++arithmetic/SoftFloat.html'.
++
++THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++
++Derivative works are acceptable, even for commercial purposes, so long as
++(1) the source code for the derivative work includes prominent notice that
++the work is derivative, and (2) the source code includes prominent notice with
++these four paragraphs for those parts of this code that are retained.
++
++=============================================================================*/
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point types.
++*----------------------------------------------------------------------------*/
++typedef bits32 float32;
++typedef struct {
++ bits32 high, low;
++} float64;
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point underflow tininess-detection mode.
++*----------------------------------------------------------------------------*/
++extern int8 float_detect_tininess;
++enum {
++ float_tininess_after_rounding = 0,
++ float_tininess_before_rounding = 1
++};
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point rounding mode.
++*----------------------------------------------------------------------------*/
++extern int8 float_rounding_mode;
++enum {
++ float_round_nearest_even = 0,
++ float_round_to_zero = 1,
++ float_round_up = 2,
++ float_round_down = 3
++};
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point exception flags.
++*----------------------------------------------------------------------------*/
++/*
++extern int8 float_exception_flags;
++enum {
++ float_flag_inexact = 1,
++ float_flag_underflow = 2,
++ float_flag_overflow = 4,
++ float_flag_divbyzero = 8,
++ float_flag_invalid = 16
++};
++*/
++
++extern int8 float_exception_flags;
++enum {
++ float_flag_inexact = 16,
++ float_flag_underflow = 2,
++ float_flag_overflow = 1,
++ float_flag_divbyzero = 4,
++ float_flag_invalid = 8
++};
++
++/*----------------------------------------------------------------------------
++| Routine to raise any or all of the software IEC/IEEE floating-point
++| exception flags.
++*----------------------------------------------------------------------------*/
++void float_raise( int8 );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE integer-to-floating-point conversion routines.
++*----------------------------------------------------------------------------*/
++float32 int32_to_float32( int32 );
++float64 int32_to_float64( int32 );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE single-precision conversion routines.
++*----------------------------------------------------------------------------*/
++int32 float32_to_int32( float32 );
++int32 float32_to_int32_round_to_zero( float32 );
++float64 float32_to_float64( float32 );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE single-precision operations.
++*----------------------------------------------------------------------------*/
++float32 float32_round_to_int( float32 );
++float32 float32_add( float32, float32 );
++float32 float32_sub( float32, float32 );
++float32 float32_mul( float32, float32 );
++float32 float32_div( float32, float32 );
++float32 float32_rem( float32, float32 );
++float32 float32_sqrt( float32 );
++flag float32_eq( float32, float32 );
++flag float32_le( float32, float32 );
++flag float32_lt( float32, float32 );
++flag float32_eq_signaling( float32, float32 );
++flag float32_le_quiet( float32, float32 );
++flag float32_lt_quiet( float32, float32 );
++flag float32_is_signaling_nan( float32 );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE double-precision conversion routines.
++*----------------------------------------------------------------------------*/
++int32 float64_to_int32( float64 );
++int32 float64_to_int32_round_to_zero( float64 );
++float32 float64_to_float32( float64 );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE double-precision operations.
++*----------------------------------------------------------------------------*/
++float64 float64_round_to_int( float64 );
++float64 float64_add( float64, float64 );
++float64 float64_sub( float64, float64 );
++float64 float64_mul( float64, float64 );
++float64 float64_div( float64, float64 );
++float64 float64_rem( float64, float64 );
++float64 float64_sqrt( float64 );
++flag float64_eq( float64, float64 );
++flag float64_le( float64, float64 );
++flag float64_lt( float64, float64 );
++flag float64_eq_signaling( float64, float64 );
++flag float64_le_quiet( float64, float64 );
++flag float64_lt_quiet( float64, float64 );
++flag float64_is_signaling_nan( float64 );
++
+diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile
+new file mode 100644
+index 0000000..a5e2cc7
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/Makefile
+@@ -0,0 +1,24 @@
++
++PROCESSOR_H = ../../../processors/powerpc-GCC.h
++SOFTFLOAT_MACROS = ../softfloat-macros
++
++OBJ = .o
++EXE =
++INCLUDES = -I. -I..
++COMPILE_C = $(COMPILE_PREFIX) -mcpu=8548 -mhard-float -mfloat-gprs=double -o $@ $(INCLUDES) -I- -O2
++LINK = $(COMPILE_PREFIX) -o $@
++
++ALL: softfloat$(OBJ) timesoftfloat$(EXE)
++
++milieu.h: $(PROCESSOR_H)
++ touch milieu.h
++
++softfloat$(OBJ): milieu.h softfloat.h softfloat-specialize $(SOFTFLOAT_MACROS) ../softfloat.c
++ $(COMPILE_C) ../softfloat.c
++
++timesoftfloat$(OBJ): milieu.h softfloat.h ../timesoftfloat.c
++ $(COMPILE_C) ../timesoftfloat.c
++
++timesoftfloat$(EXE): softfloat$(OBJ) timesoftfloat$(OBJ)
++ $(LINK) softfloat$(OBJ) timesoftfloat$(OBJ)
++
+diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h
+new file mode 100644
+index 0000000..1b66490
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/milieu.h
+@@ -0,0 +1,55 @@
++/*
++ * This file is derived from softfloat/bits64/386-Win32-GCC/milieu.h,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ */
++
++/*============================================================================
++
++This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
++Package, Release 2b.
++
++Written by John R. Hauser. This work was made possible in part by the
++International Computer Science Institute, located at Suite 600, 1947 Center
++Street, Berkeley, California 94704. Funding was partially provided by the
++National Science Foundation under grant MIP-9311980. The original version
++of this code was written as part of a project to build a fixed-point vector
++processor in collaboration with the University of California at Berkeley,
++overseen by Profs. Nelson Morgan and John Wawrzynek. More information
++is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
++arithmetic/SoftFloat.html'.
++
++THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++
++Derivative works are acceptable, even for commercial purposes, so long as
++(1) the source code for the derivative work includes prominent notice that
++the work is derivative, and (2) the source code includes prominent notice with
++these four paragraphs for those parts of this code that are retained.
++
++=============================================================================*/
++
++/*----------------------------------------------------------------------------
++| Include common integer types and flags.
++*----------------------------------------------------------------------------*/
++#include "../../../processors/SPARC-GCC.h"
++
++/*----------------------------------------------------------------------------
++| Symbolic Boolean literals.
++*----------------------------------------------------------------------------*/
++enum {
++ FALSE = 0,
++ TRUE = 1
++};
++
+diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize
+new file mode 100644
+index 0000000..b1d0bc8
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat-specialize
+@@ -0,0 +1,422 @@
++/*
++ * This file is derived from softfloat/bits64/386-Win32-GCC/softfloat-specialize,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ */
++
++/*============================================================================
++
++This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
++Arithmetic Package, Release 2b.
++
++Written by John R. Hauser. This work was made possible in part by the
++International Computer Science Institute, located at Suite 600, 1947 Center
++Street, Berkeley, California 94704. Funding was partially provided by the
++National Science Foundation under grant MIP-9311980. The original version
++of this code was written as part of a project to build a fixed-point vector
++processor in collaboration with the University of California at Berkeley,
++overseen by Profs. Nelson Morgan and John Wawrzynek. More information
++is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
++arithmetic/SoftFloat.html'.
++
++THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++
++Derivative works are acceptable, even for commercial purposes, so long as
++(1) the source code for the derivative work includes prominent notice that
++the work is derivative, and (2) the source code includes prominent notice with
++these four paragraphs for those parts of this code that are retained.
++
++=============================================================================*/
++
++/*----------------------------------------------------------------------------
++| Underflow tininess-detection mode, statically initialized to default value.
++| (The declaration in `softfloat.h' must match the `int8' type here.)
++*----------------------------------------------------------------------------*/
++int8 float_detect_tininess = float_tininess_before_rounding;
++
++/*----------------------------------------------------------------------------
++| Raises the exceptions specified by `flags'. Floating-point traps can be
++| defined here if desired. It is currently not possible for such a trap
++| to substitute a result value. If traps are not implemented, this routine
++| should be simply `float_exception_flags |= flags;'.
++*----------------------------------------------------------------------------*/
++
++void float_raise( int8 flags )
++{
++
++ float_exception_flags |= flags;
++
++}
++
++/*----------------------------------------------------------------------------
++| Internal canonical NaN format.
++*----------------------------------------------------------------------------*/
++typedef struct {
++ flag sign;
++ bits64 high, low;
++} commonNaNT;
++
++/*----------------------------------------------------------------------------
++| The pattern for a default generated single-precision NaN.
++*----------------------------------------------------------------------------*/
++#define float32_default_nan 0x7FFFFFFF
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the single-precision floating-point value `a' is a NaN;
++| otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float32_is_nan( float32 a )
++{
++
++ return ( 0xFF000000 < (bits32) ( a<<1 ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the single-precision floating-point value `a' is a signaling
++| NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float32_is_signaling_nan( float32 a )
++{
++
++ return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the single-precision floating-point NaN
++| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
++| exception is raised.
++*----------------------------------------------------------------------------*/
++
++static commonNaNT float32ToCommonNaN( float32 a )
++{
++ commonNaNT z;
++
++ if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
++ z.sign = a>>31;
++ z.low = 0;
++ z.high = ( (bits64) a )<<41;
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the canonical NaN `a' to the single-
++| precision floating-point format.
++*----------------------------------------------------------------------------*/
++
++static float32 commonNaNToFloat32( commonNaNT a )
++{
++
++ return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>41 );
++
++}
++
++/*----------------------------------------------------------------------------
++| Takes two single-precision floating-point values `a' and `b', one of which
++| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
++| signaling NaN, the invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static float32 propagateFloat32NaN( float32 a, float32 b )
++{
++ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
++
++ aIsNaN = float32_is_nan( a );
++ aIsSignalingNaN = float32_is_signaling_nan( a );
++ bIsNaN = float32_is_nan( b );
++ bIsSignalingNaN = float32_is_signaling_nan( b );
++ a |= 0x00400000;
++ b |= 0x00400000;
++ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
++ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
++
++}
++
++/*----------------------------------------------------------------------------
++| The pattern for a default generated double-precision NaN.
++*----------------------------------------------------------------------------*/
++#define float64_default_nan LIT64( 0x7FFFFFFFFFFFFFFF )
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the double-precision floating-point value `a' is a NaN;
++| otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float64_is_nan( float64 a )
++{
++
++ return ( LIT64( 0xFFE0000000000000 ) < (bits64) ( a<<1 ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the double-precision floating-point value `a' is a signaling
++| NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float64_is_signaling_nan( float64 a )
++{
++
++ return
++ ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
++ && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the double-precision floating-point NaN
++| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
++| exception is raised.
++*----------------------------------------------------------------------------*/
++
++static commonNaNT float64ToCommonNaN( float64 a )
++{
++ commonNaNT z;
++
++ if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
++ z.sign = a>>63;
++ z.low = 0;
++ z.high = a<<12;
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the canonical NaN `a' to the double-
++| precision floating-point format.
++*----------------------------------------------------------------------------*/
++
++static float64 commonNaNToFloat64( commonNaNT a )
++{
++
++ return
++ ( ( (bits64) a.sign )<<63 )
++ | LIT64( 0x7FF8000000000000 )
++ | ( a.high>>12 );
++
++}
++
++/*----------------------------------------------------------------------------
++| Takes two double-precision floating-point values `a' and `b', one of which
++| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
++| signaling NaN, the invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static float64 propagateFloat64NaN( float64 a, float64 b )
++{
++ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
++
++ aIsNaN = float64_is_nan( a );
++ aIsSignalingNaN = float64_is_signaling_nan( a );
++ bIsNaN = float64_is_nan( b );
++ bIsSignalingNaN = float64_is_signaling_nan( b );
++ a |= LIT64( 0x0008000000000000 );
++ b |= LIT64( 0x0008000000000000 );
++ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
++ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
++
++}
++
++#ifdef FLOATX80
++
++/*----------------------------------------------------------------------------
++| The pattern for a default generated extended double-precision NaN. The
++| `high' and `low' values hold the most- and least-significant bits,
++| respectively.
++*----------------------------------------------------------------------------*/
++#define floatx80_default_nan_high 0x7FFF
++#define floatx80_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the extended double-precision floating-point value `a' is a
++| NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag floatx80_is_nan( floatx80 a )
++{
++
++ return ( ( a.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( a.low<<1 );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the extended double-precision floating-point value `a' is a
++| signaling NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag floatx80_is_signaling_nan( floatx80 a )
++{
++ bits64 aLow;
++
++ aLow = a.low & ~ LIT64( 0x4000000000000000 );
++ return
++ ( ( a.high & 0x7FFF ) == 0x7FFF )
++ && (bits64) ( aLow<<1 )
++ && ( a.low == aLow );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the extended double-precision floating-
++| point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
++| invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static commonNaNT floatx80ToCommonNaN( floatx80 a )
++{
++ commonNaNT z;
++
++ if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
++ z.sign = a.high>>15;
++ z.low = 0;
++ z.high = a.low<<1;
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the canonical NaN `a' to the extended
++| double-precision floating-point format.
++*----------------------------------------------------------------------------*/
++
++static floatx80 commonNaNToFloatx80( commonNaNT a )
++{
++ floatx80 z;
++
++ z.low = LIT64( 0xC000000000000000 ) | ( a.high>>1 );
++ z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Takes two extended double-precision floating-point values `a' and `b', one
++| of which is a NaN, and returns the appropriate NaN result. If either `a' or
++| `b' is a signaling NaN, the invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b )
++{
++ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
++
++ aIsNaN = floatx80_is_nan( a );
++ aIsSignalingNaN = floatx80_is_signaling_nan( a );
++ bIsNaN = floatx80_is_nan( b );
++ bIsSignalingNaN = floatx80_is_signaling_nan( b );
++ a.low |= LIT64( 0xC000000000000000 );
++ b.low |= LIT64( 0xC000000000000000 );
++ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
++ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
++
++}
++
++#endif
++
++#ifdef FLOAT128
++
++/*----------------------------------------------------------------------------
++| The pattern for a default generated quadruple-precision NaN. The `high' and
++| `low' values hold the most- and least-significant bits, respectively.
++*----------------------------------------------------------------------------*/
++#define float128_default_nan_high LIT64( 0x7FFFFFFFFFFFFFFF )
++#define float128_default_nan_low LIT64( 0xFFFFFFFFFFFFFFFF )
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the quadruple-precision floating-point value `a' is a NaN;
++| otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float128_is_nan( float128 a )
++{
++
++ return
++ ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
++ && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns 1 if the quadruple-precision floating-point value `a' is a
++| signaling NaN; otherwise returns 0.
++*----------------------------------------------------------------------------*/
++
++flag float128_is_signaling_nan( float128 a )
++{
++
++ return
++ ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
++ && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the quadruple-precision floating-point NaN
++| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
++| exception is raised.
++*----------------------------------------------------------------------------*/
++
++static commonNaNT float128ToCommonNaN( float128 a )
++{
++ commonNaNT z;
++
++ if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
++ z.sign = a.high>>63;
++ shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Returns the result of converting the canonical NaN `a' to the quadruple-
++| precision floating-point format.
++*----------------------------------------------------------------------------*/
++
++static float128 commonNaNToFloat128( commonNaNT a )
++{
++ float128 z;
++
++ shift128Right( a.high, a.low, 16, &z.high, &z.low );
++ z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF800000000000 );
++ return z;
++
++}
++
++/*----------------------------------------------------------------------------
++| Takes two quadruple-precision floating-point values `a' and `b', one of
++| which is a NaN, and returns the appropriate NaN result. If either `a' or
++| `b' is a signaling NaN, the invalid exception is raised.
++*----------------------------------------------------------------------------*/
++
++static float128 propagateFloat128NaN( float128 a, float128 b )
++{
++ flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
++
++ aIsNaN = float128_is_nan( a );
++ aIsSignalingNaN = float128_is_signaling_nan( a );
++ bIsNaN = float128_is_nan( b );
++ bIsSignalingNaN = float128_is_signaling_nan( b );
++ a.high |= LIT64( 0x0000800000000000 );
++ b.high |= LIT64( 0x0000800000000000 );
++ if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
++ return bIsSignalingNaN ? b : aIsSignalingNaN ? a : bIsNaN ? b : a;
++
++}
++
++#endif
++
+diff --git a/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h
+new file mode 100644
+index 0000000..5b7cb1c
+--- /dev/null
++++ b/SoftFloat-2b/softfloat/bits64/powerpc-GCC/softfloat.h
+@@ -0,0 +1,269 @@
++/*
++ * This file is derived from softfloat/bits64/386-Win32-GCC/softfloat.h,
++ * the copyright for that material belongs to the original owners.
++ *
++ * Additional material and changes where applicable is:
++ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
++ *
++ * Author: Ebony Zhu, <ebony.zhu@freescale.com>
++ * Yu Liu, <yu.liu@freescale.com>
++ */
++
++/*============================================================================
++
++This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
++Package, Release 2b.
++
++Written by John R. Hauser. This work was made possible in part by the
++International Computer Science Institute, located at Suite 600, 1947 Center
++Street, Berkeley, California 94704. Funding was partially provided by the
++National Science Foundation under grant MIP-9311980. The original version
++of this code was written as part of a project to build a fixed-point vector
++processor in collaboration with the University of California at Berkeley,
++overseen by Profs. Nelson Morgan and John Wawrzynek. More information
++is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
++arithmetic/SoftFloat.html'.
++
++THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
++been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
++RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
++AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
++COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
++EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
++INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
++OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
++
++Derivative works are acceptable, even for commercial purposes, so long as
++(1) the source code for the derivative work includes prominent notice that
++the work is derivative, and (2) the source code includes prominent notice with
++these four paragraphs for those parts of this code that are retained.
++
++=============================================================================*/
++
++/*----------------------------------------------------------------------------
++| The macro `FLOATX80' must be defined to enable the extended double-precision
++| floating-point format `floatx80'. If this macro is not defined, the
++| `floatx80' type will not be defined, and none of the functions that either
++| input or output the `floatx80' type will be defined. The same applies to
++| the `FLOAT128' macro and the quadruple-precision format `float128'.
++*----------------------------------------------------------------------------*/
++#define FLOATX80
++#define FLOAT128
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point types.
++*----------------------------------------------------------------------------*/
++typedef unsigned int float32;
++typedef unsigned long long float64;
++#ifdef FLOATX80
++typedef struct {
++ unsigned short high;
++ unsigned long long low;
++} floatx80;
++#endif
++#ifdef FLOAT128
++typedef struct {
++ unsigned long long high, low;
++} float128;
++#endif
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point underflow tininess-detection mode.
++*----------------------------------------------------------------------------*/
++extern int float_detect_tininess;
++enum {
++ float_tininess_after_rounding = 0,
++ float_tininess_before_rounding = 1
++};
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point rounding mode.
++*----------------------------------------------------------------------------*/
++extern int float_rounding_mode;
++enum {
++ float_round_nearest_even = 0,
++ float_round_to_zero = 1,
++ float_round_up = 2,
++ float_round_down = 3
++};
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE floating-point exception flags.
++*----------------------------------------------------------------------------*/
++extern int float_exception_flags;
++enum {
++ float_flag_inexact = 1,
++ float_flag_divbyzero = 2,
++ float_flag_underflow = 4,
++ float_flag_overflow = 8,
++ float_flag_invalid = 16
++};
++
++/*----------------------------------------------------------------------------
++| Routine to raise any or all of the software IEC/IEEE floating-point
++| exception flags.
++*----------------------------------------------------------------------------*/
++void float_raise( int );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE integer-to-floating-point conversion routines.
++*----------------------------------------------------------------------------*/
++float32 int32_to_float32( int );
++float64 int32_to_float64( int );
++#ifdef FLOATX80
++floatx80 int32_to_floatx80( int );
++#endif
++#ifdef FLOAT128
++float128 int32_to_float128( int );
++#endif
++float32 int64_to_float32( long long );
++float64 int64_to_float64( long long );
++#ifdef FLOATX80
++floatx80 int64_to_floatx80( long long );
++#endif
++#ifdef FLOAT128
++float128 int64_to_float128( long long );
++#endif
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE single-precision conversion routines.
++*----------------------------------------------------------------------------*/
++int float32_to_int32( float32 );
++int float32_to_int32_round_to_zero( float32 );
++long long float32_to_int64( float32 );
++long long float32_to_int64_round_to_zero( float32 );
++float64 float32_to_float64( float32 );
++#ifdef FLOATX80
++floatx80 float32_to_floatx80( float32 );
++#endif
++#ifdef FLOAT128
++float128 float32_to_float128( float32 );
++#endif
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE single-precision operations.
++*----------------------------------------------------------------------------*/
++float32 float32_round_to_int( float32 );
++float32 float32_add( float32, float32 );
++float32 float32_sub( float32, float32 );
++float32 float32_mul( float32, float32 );
++float32 float32_div( float32, float32 );
++float32 float32_rem( float32, float32 );
++float32 float32_sqrt( float32 );
++int float32_eq( float32, float32 );
++int float32_le( float32, float32 );
++int float32_lt( float32, float32 );
++int float32_eq_signaling( float32, float32 );
++int float32_le_quiet( float32, float32 );
++int float32_lt_quiet( float32, float32 );
++int float32_is_signaling_nan( float32 );
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE double-precision conversion routines.
++*----------------------------------------------------------------------------*/
++int float64_to_int32( float64 );
++int float64_to_int32_round_to_zero( float64 );
++long long float64_to_int64( float64 );
++long long float64_to_int64_round_to_zero( float64 );
++float32 float64_to_float32( float64 );
++#ifdef FLOATX80
++floatx80 float64_to_floatx80( float64 );
++#endif
++#ifdef FLOAT128
++float128 float64_to_float128( float64 );
++#endif
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE double-precision operations.
++*----------------------------------------------------------------------------*/
++float64 float64_round_to_int( float64 );
++float64 float64_add( float64, float64 );
++float64 float64_sub( float64, float64 );
++float64 float64_mul( float64, float64 );
++float64 float64_div( float64, float64 );
++float64 float64_rem( float64, float64 );
++float64 float64_sqrt( float64 );
++int float64_eq( float64, float64 );
++int float64_le( float64, float64 );
++int float64_lt( float64, float64 );
++int float64_eq_signaling( float64, float64 );
++int float64_le_quiet( float64, float64 );
++int float64_lt_quiet( float64, float64 );
++int float64_is_signaling_nan( float64 );
++
++#ifdef FLOATX80
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE extended double-precision conversion routines.
++*----------------------------------------------------------------------------*/
++int floatx80_to_int32( floatx80 );
++int floatx80_to_int32_round_to_zero( floatx80 );
++long long floatx80_to_int64( floatx80 );
++long long floatx80_to_int64_round_to_zero( floatx80 );
++float32 floatx80_to_float32( floatx80 );
++float64 floatx80_to_float64( floatx80 );
++#ifdef FLOAT128
++float128 floatx80_to_float128( floatx80 );
++#endif
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE extended double-precision rounding precision. Valid
++| values are 32, 64, and 80.
++*----------------------------------------------------------------------------*/
++extern int floatx80_rounding_precision;
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE extended double-precision operations.
++*----------------------------------------------------------------------------*/
++floatx80 floatx80_round_to_int( floatx80 );
++floatx80 floatx80_add( floatx80, floatx80 );
++floatx80 floatx80_sub( floatx80, floatx80 );
++floatx80 floatx80_mul( floatx80, floatx80 );
++floatx80 floatx80_div( floatx80, floatx80 );
++floatx80 floatx80_rem( floatx80, floatx80 );
++floatx80 floatx80_sqrt( floatx80 );
++int floatx80_eq( floatx80, floatx80 );
++int floatx80_le( floatx80, floatx80 );
++int floatx80_lt( floatx80, floatx80 );
++int floatx80_eq_signaling( floatx80, floatx80 );
++int floatx80_le_quiet( floatx80, floatx80 );
++int floatx80_lt_quiet( floatx80, floatx80 );
++int floatx80_is_signaling_nan( floatx80 );
++
++#endif
++
++#ifdef FLOAT128
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE quadruple-precision conversion routines.
++*----------------------------------------------------------------------------*/
++int float128_to_int32( float128 );
++int float128_to_int32_round_to_zero( float128 );
++long long float128_to_int64( float128 );
++long long float128_to_int64_round_to_zero( float128 );
++float32 float128_to_float32( float128 );
++float64 float128_to_float64( float128 );
++#ifdef FLOATX80
++floatx80 float128_to_floatx80( float128 );
++#endif
++
++/*----------------------------------------------------------------------------
++| Software IEC/IEEE quadruple-precision operations.
++*----------------------------------------------------------------------------*/
++float128 float128_round_to_int( float128 );
++float128 float128_add( float128, float128 );
++float128 float128_sub( float128, float128 );
++float128 float128_mul( float128, float128 );
++float128 float128_div( float128, float128 );
++float128 float128_rem( float128, float128 );
++float128 float128_sqrt( float128 );
++int float128_eq( float128, float128 );
++int float128_le( float128, float128 );
++int float128_lt( float128, float128 );
++int float128_eq_signaling( float128, float128 );
++int float128_le_quiet( float128, float128 );
++int float128_lt_quiet( float128, float128 );
++int float128_is_signaling_nan( float128 );
++
++#endif
++
+--
+1.5.4
+