From 6d8d8b3018bacc5b578ff567b2e20e6ec4abcd6c Mon Sep 17 00:00:00 2001 From: Peter Hoyes Date: Fri, 10 Dec 2021 16:37:26 +0000 Subject: [PATCH 09/11] armv8: Make disabling HVC configurable when switching to EL1 On the BASER_FVP there is no EL3, so HVC is used to provide PSCI services. Therefore we cannot disable hypercalls. Create CONFIG_ARMV8_DISABLE_HVC (dependent on CONFIG_ARMV8_TO_EL1) to control whether to disable HVC exceptions in HCR_EL2->HCD Issue-Id: SCM-3728 Upstream-Status: Inappropriate [other] Implementation pending further discussion Signed-off-by: Peter Hoyes Change-Id: I463d82f1db8a3cafcab40a9c0c208753569cc300 --- arch/arm/cpu/armv8/Kconfig | 9 +++++++++ arch/arm/include/asm/macro.h | 10 ++++++++-- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index d7de36acfe..704ed2b3d3 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -185,4 +185,13 @@ config ARMV8_SWITCH_TO_EL1 operating system does not support booting at EL2, or you wish to prevent any hypervisors from running. Supported for bootm, booti and bootefi. +config ARMV8_DISABLE_HVC + bool "Disable HVC calls before switching to EL1" + depends on ARMV8_SWITCH_TO_EL1 + default y + help + If switching to EL1 before loading the operating system, disable taking + hypercalls back to EL2. May be disabled if, for example, PSCI services are + running at EL2. + endif diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index ec0171e0e6..6d267cbae2 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -311,9 +311,12 @@ lr .req x30 ldr \tmp2, =(ID_AA64ISAR1_EL1_GPI | ID_AA64ISAR1_EL1_GPA | \ ID_AA64ISAR1_EL1_API | ID_AA64ISAR1_EL1_APA) tst \tmp, \tmp2 - mov \tmp2, #(HCR_EL2_RW_AARCH64 | HCR_EL2_HCD_DIS) + mov \tmp2, #(HCR_EL2_RW_AARCH64) orr \tmp, \tmp2, #(HCR_EL2_APK | HCR_EL2_API) csel \tmp, \tmp2, \tmp, eq +#ifdef CONFIG_ARMV8_DISABLE_HVC + orr \tmp, \tmp, #(HCR_EL2_HCD_DIS) +#endif msr hcr_el2, \tmp /* Return to the EL1_SP1 mode from EL2 */ @@ -326,7 +329,10 @@ lr .req x30 1: /* Initialize HCR_EL2 */ - ldr \tmp, =(HCR_EL2_RW_AARCH32 | HCR_EL2_HCD_DIS) + ldr \tmp, =(HCR_EL2_RW_AARCH32) +#ifdef CONFIG_ARMV8_DISABLE_HVC + orr \tmp, \tmp, #(HCR_EL2_HCD_DIS) +#endif msr hcr_el2, \tmp /* Return to AArch32 Supervisor mode from EL2 */ -- 2.25.1