blob: 19eedbf1b8c7742484596d7e9057de88be10d812 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
From f811f3596ae62941ce01aa84beef4159844de39f Mon Sep 17 00:00:00 2001
From: Sudheesh Mavila <sudheesh.mavila@amd.com>
Date: Wed, 11 Nov 2020 12:13:33 +0530
Subject: [PATCH 09/10] amd-xgbe: increased cdr delay
amd-xgbe driver needs delay to emable CDR.
Some link partner's use 20ms of idle time before sending valid clock.
The patch uses a delay of 22ms for the first time and increases
by a step of 22ms.
Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com>
---
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
index a043c30358d2..f3566a480f2d 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
@@ -149,9 +149,9 @@
#define XGBE_RATECHANGE_COUNT 500
/* CDR delay values for KR support (in usec) */
-#define XGBE_CDR_DELAY_INIT 10000
-#define XGBE_CDR_DELAY_INC 10000
-#define XGBE_CDR_DELAY_MAX 100000
+#define XGBE_CDR_DELAY_INIT 22000
+#define XGBE_CDR_DELAY_INC 22000
+#define XGBE_CDR_DELAY_MAX 110000
/* RRC frequency during link status check */
#define XGBE_RRC_FREQUENCY 10
--
2.17.1
|