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From 2981ddcb0ef88dbf75fd9924dd8d6d161145483b Mon Sep 17 00:00:00 2001
From: Arindam Nath <arindam.nath@amd.com>
Date: Tue, 22 Mar 2016 12:09:30 +0530
Subject: [PATCH 2/6] amdgpu: drop address patching logics
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
we don't support non-page-aligned cpu pointer anymore
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
amdgpu/amdgpu_bo.c | 11 +----------
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
index 1a5a401..2ae1c18 100644
--- a/amdgpu/amdgpu_bo.c
+++ b/amdgpu/amdgpu_bo.c
@@ -537,17 +537,8 @@ int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
int r;
struct amdgpu_bo *bo;
struct drm_amdgpu_gem_userptr args;
- uintptr_t cpu0;
- uint32_t ps, off;
- memset(&args, 0, sizeof(args));
- ps = getpagesize();
-
- cpu0 = ROUND_DOWN((uintptr_t)cpu, ps);
- off = (uintptr_t)cpu - cpu0;
- size = ROUND_UP(size + off, ps);
-
- args.addr = cpu0;
+ args.addr = (uintptr_t)cpu;
args.flags = AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_REGISTER;
args.size = size;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_USERPTR,
--
1.9.1
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