From 9afc3df3cff3343b3d9a7705fe84b85f8b1f3163 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Date: Mon, 27 Aug 2018 13:51:27 +0200 Subject: [PATCH 5235/5725] drm/amdgpu: distinct between allocated GART space and GMC addr MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Most of the time we only need to know if the BO has a valid GMC addr. Change-Id: I3864f3f5c1cbdd12db06445e1597ccab1e7d5fad Signed-off-by: Christian König Reviewed-by: Junwei Zhang Acked-by: Felix Kuehling Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 -- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 13 +++++-------- 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 6f86f44..a4092d9 100755 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c @@ -1403,8 +1403,6 @@ void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence, u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo) { WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_SYSTEM); - WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_TT && - !amdgpu_gtt_mgr_has_gart_addr(&bo->tbo.mem)); WARN_ON_ONCE(!ww_mutex_is_locked(&bo->tbo.resv->lock) && !bo->pin_count); WARN_ON_ONCE(bo->tbo.mem.start == AMDGPU_BO_INVALID_OFFSET); diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 7053715..0916667 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -365,7 +365,7 @@ static uint64_t amdgpu_mm_node_addr(struct ttm_buffer_object *bo, { uint64_t addr = 0; - if (mem->mem_type != TTM_PL_TT || amdgpu_gtt_mgr_has_gart_addr(mem)) { + if (mm_node->start != AMDGPU_BO_INVALID_OFFSET) { addr = mm_node->start << PAGE_SHIFT; addr += bo->bdev->man[mem->mem_type].gpu_offset; } @@ -453,8 +453,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, /* Map only what needs to be accessed. Map src to window 0 and * dst to window 1 */ - if (src->mem->mem_type == TTM_PL_TT && - !amdgpu_gtt_mgr_has_gart_addr(src->mem)) { + if (src->mem->start == AMDGPU_BO_INVALID_OFFSET) { r = amdgpu_map_buffer(src->bo, src->mem, PFN_UP(cur_size + src_page_offset), src_node_start, 0, ring, @@ -467,8 +466,7 @@ int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev, from += src_page_offset; } - if (dst->mem->mem_type == TTM_PL_TT && - !amdgpu_gtt_mgr_has_gart_addr(dst->mem)) { + if (dst->mem->start == AMDGPU_BO_INVALID_OFFSET) { r = amdgpu_map_buffer(dst->bo, dst->mem, PFN_UP(cur_size + dst_page_offset), dst_node_start, 1, ring, @@ -1122,11 +1120,10 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) uint64_t flags; int r; - if (bo->mem.mem_type != TTM_PL_TT || - amdgpu_gtt_mgr_has_gart_addr(&bo->mem)) + if (bo->mem.start != AMDGPU_BO_INVALID_OFFSET) return 0; - /* allocate GTT space */ + /* allocate GART space */ tmp = bo->mem; tmp.mm_node = NULL; placement.num_placement = 1; -- 2.7.4