From 9b64db5c2770d744329667f847c51d72eb97516c Mon Sep 17 00:00:00 2001 From: Felix Kuehling Date: Wed, 13 Mar 2019 08:30:48 -0400 Subject: [PATCH 1625/2940] drm/amdgpu: Wait for newly allocated PTs to be idle MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When page table are updated by the CPU, synchronize with the allocation and initialization of newly allocated page tables. Change-Id: I3df65aa1fb56f9e9581140c361250aa37996a119 Signed-off-by: Felix Kuehling Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index 688ebc71c6c1..14c6a0af7ada 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -873,17 +873,17 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm, } /** - * amdgpu_vm_alloc_pts - Allocate page tables. + * amdgpu_vm_alloc_pts - Allocate a specific page table * * @adev: amdgpu_device pointer * @vm: VM to allocate page tables for - * @saddr: Start address which needs to be allocated - * @size: Size from start address we need. + * @cursor: Which page table to allocate * - * Make sure the page directories and page tables are allocated + * Make sure a specific page table or directory is allocated. * * Returns: - * 0 on success, errno otherwise. + * 1 if page table needed to be allocated, 0 if page table was already + * allocated, negative errno if an error occurred. */ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, struct amdgpu_vm *vm, @@ -930,7 +930,7 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, if (r) goto error_free_pt; - return 0; + return 1; error_free_pt: amdgpu_bo_unref(&pt->shadow); @@ -1587,10 +1587,12 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, unsigned shift, parent_shift, mask; uint64_t incr, entry_end, pe_start; struct amdgpu_bo *pt; + bool need_to_sync; r = amdgpu_vm_alloc_pts(params->adev, params->vm, &cursor); - if (r) + if (r < 0) return r; + need_to_sync = (r && params->vm->use_cpu_for_update); pt = cursor.entry->base.bo; @@ -1638,6 +1640,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, entry_end += cursor.pfn & ~(entry_end - 1); entry_end = min(entry_end, end); + if (need_to_sync) + r = amdgpu_bo_sync_wait(params->vm->root.base.bo, + AMDGPU_FENCE_OWNER_VM, true); + do { uint64_t upd_end = min(entry_end, frag_end); unsigned nptes = (upd_end - frag_start) >> shift; -- 2.17.1