From b301cf00dd28222426a3f14f20cf833a521c5dd1 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 15 Mar 2016 12:30:09 -0400 Subject: [PATCH 0958/1110] drm/amdgpu: add dal support for polaris Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +- drivers/gpu/drm/amd/amdgpu/vi.c | 79 ++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index b73533d..8885e9e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1407,9 +1407,11 @@ bool amdgpu_device_has_dal_support(struct amdgpu_device *adev) case CHIP_HAWAII: return amdgpu_dal != 0; #endif -#if defined(CONFIG_DRM_AMD_DAL) && defined(CONFIG_DRM_AMD_DAL_DCE11_0) +#if defined(CONFIG_DRM_AMD_DAL) && (defined(CONFIG_DRM_AMD_DAL_DCE11_0) || defined(CONFIG_DRM_AMD_DAL_DCE11_2)) case CHIP_CARRIZO: case CHIP_STONEY: + case CHIP_POLARIS11: + case CHIP_POLARIS10: return amdgpu_dal != 0; #endif #if defined(CONFIG_DRM_AMD_DAL) && defined(CONFIG_DRM_AMD_DAL_DCE10_0) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index ef80cfb..8d876a7 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -1144,6 +1144,75 @@ static const struct amdgpu_ip_block_version cz_ip_blocks_dal[] = #endif }; +static const struct amdgpu_ip_block_version polaris11_ip_blocks_dal[] = +{ + /* ORDER MATTERS! */ + { + .type = AMD_IP_BLOCK_TYPE_COMMON, + .major = 2, + .minor = 0, + .rev = 0, + .funcs = &vi_common_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_GMC, + .major = 8, + .minor = 1, + .rev = 0, + .funcs = &gmc_v8_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_IH, + .major = 3, + .minor = 1, + .rev = 0, + .funcs = &tonga_ih_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_SMC, + .major = 7, + .minor = 2, + .rev = 0, + /* To Do */ + .funcs = &amdgpu_pp_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_DCE, + .major = 11, + .minor = 2, + .rev = 0, + .funcs = &amdgpu_dm_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_GFX, + .major = 8, + .minor = 0, + .rev = 0, + .funcs = &gfx_v8_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_SDMA, + .major = 3, + .minor = 1, + .rev = 0, + .funcs = &sdma_v3_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_UVD, + .major = 6, + .minor = 3, + .rev = 0, + .funcs = &uvd_v6_0_ip_funcs, + }, + { + .type = AMD_IP_BLOCK_TYPE_VCE, + .major = 3, + .minor = 4, + .rev = 0, + .funcs = &vce_v3_0_ip_funcs, + }, +}; + static const struct amdgpu_ip_block_version tonga_ip_blocks_dal[] = { /* ORDER MATTERS! */ @@ -1318,8 +1387,18 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) break; case CHIP_POLARIS11: case CHIP_POLARIS10: +#if defined(CONFIG_DRM_AMD_DAL) + if (amdgpu_dal && amdgpu_device_has_dal_support(adev)) { + adev->ip_blocks = polaris11_ip_blocks_dal; + adev->num_ip_blocks = ARRAY_SIZE(polaris11_ip_blocks_dal); + } else { + adev->ip_blocks = polaris11_ip_blocks; + adev->num_ip_blocks = ARRAY_SIZE(polaris11_ip_blocks); + } +#else adev->ip_blocks = polaris11_ip_blocks; adev->num_ip_blocks = ARRAY_SIZE(polaris11_ip_blocks); +#endif break; case CHIP_CARRIZO: case CHIP_STONEY: -- 2.7.4