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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4679-drm-amd-display-populate-bios-integrated-info-for-re.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4679-drm-amd-display-populate-bios-integrated-info-for-re.patch75
1 files changed, 75 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4679-drm-amd-display-populate-bios-integrated-info-for-re.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4679-drm-amd-display-populate-bios-integrated-info-for-re.patch
new file mode 100644
index 00000000..ad12328e
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4679-drm-amd-display-populate-bios-integrated-info-for-re.patch
@@ -0,0 +1,75 @@
+From fb7ee5165ca7e7f7a2e32db8335f71b73550d8ff Mon Sep 17 00:00:00 2001
+From: Joseph Gravenor <joseph.gravenor@amd.com>
+Date: Thu, 7 Nov 2019 19:20:00 -0500
+Subject: [PATCH 4679/4736] drm/amd/display: populate bios integrated info for
+ renoir
+
+[Why]
+When video_memory_type bw_params->vram_type
+is assigned, wedistinguish between Ddr4MemType and LpDdr4MemType.
+Because of this we will never report that we are using
+LpDdr4MemType and never re-purpose WM set D
+
+[How]
+populate bios integrated info for renoir by adding the
+revision number for renoir and use that integrated info
+table instead of of asic_id to get the vram type
+
+Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Leo Li <sunpeng.li@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 1 +
+ .../gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 10 ++++++----
+ 2 files changed, 7 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+index 453ac65c7ee3..8b2426f14519 100644
+--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
++++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+@@ -1636,6 +1636,7 @@ static enum bp_result construct_integrated_info(
+ /* Don't need to check major revision as they are all 1 */
+ switch (revision.minor) {
+ case 11:
++ case 12:
+ result = get_integrated_info_v11(bp, info);
+ break;
+ default:
+diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+index 841095d09d3c..9f0381c68844 100644
+--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+@@ -569,7 +569,7 @@ static unsigned int find_dcfclk_for_voltage(struct dpm_clocks *clock_table, unsi
+ return 0;
+ }
+
+-static void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct hw_asic_id *asic_id)
++static void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct integrated_info *bios_info)
+ {
+ int i, j = 0;
+
+@@ -601,8 +601,8 @@ static void rn_clk_mgr_helper_populate_bw_params(struct clk_bw_params *bw_params
+ bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->FClocks[j].Vol);
+ }
+
+- bw_params->vram_type = asic_id->vram_type;
+- bw_params->num_channels = asic_id->vram_width / DDR4_DRAM_WIDTH;
++ bw_params->vram_type = bios_info->memory_type;
++ bw_params->num_channels = bios_info->ma_channel_number;
+
+ for (i = 0; i < WM_SET_COUNT; i++) {
+ bw_params->wm_table.entries[i].wm_inst = i;
+@@ -685,7 +685,9 @@ void rn_clk_mgr_construct(
+
+ if (pp_smu && pp_smu->rn_funcs.get_dpm_clock_table) {
+ pp_smu->rn_funcs.get_dpm_clock_table(&pp_smu->rn_funcs.pp_smu, &clock_table);
+- rn_clk_mgr_helper_populate_bw_params(clk_mgr->base.bw_params, &clock_table, &ctx->asic_id);
++ if (ctx->dc_bios && ctx->dc_bios->integrated_info) {
++ rn_clk_mgr_helper_populate_bw_params (clk_mgr->base.bw_params, &clock_table, ctx->dc_bios->integrated_info);
++ }
+ }
+
+ if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment) && clk_mgr->smu_ver >= 0x00371500) {
+--
+2.17.1
+