diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4533-drm-amdgpu-add-helper-func-for-psp-ring-cmd-submissi.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4533-drm-amdgpu-add-helper-func-for-psp-ring-cmd-submissi.patch | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4533-drm-amdgpu-add-helper-func-for-psp-ring-cmd-submissi.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4533-drm-amdgpu-add-helper-func-for-psp-ring-cmd-submissi.patch new file mode 100644 index 00000000..2fe6deb2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4533-drm-amdgpu-add-helper-func-for-psp-ring-cmd-submissi.patch @@ -0,0 +1,96 @@ +From 2c729023ab5775f2963046218e056d49528474a5 Mon Sep 17 00:00:00 2001 +From: Hawking Zhang <Hawking.Zhang@amd.com> +Date: Mon, 18 Nov 2019 17:03:12 +0800 +Subject: [PATCH 4533/4736] drm/amdgpu: add helper func for psp ring cmd + submission + +Except for ring wptr update, the psp ring cmd submission +function shouldn't be IP specific one. Create a common +helper function to be shared for all the ASICs. + +Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> +Reviewed-by: John Clements <john.clements@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 50 +++++++++++++++++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 4 ++ + 2 files changed, 54 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +index 2b513e41ed3c..648cf9a49203 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +@@ -1724,6 +1724,56 @@ int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx, + return psp_execute_np_fw_load(&adev->psp, &ucode); + } + ++int psp_ring_cmd_submit(struct psp_context *psp, ++ uint64_t cmd_buf_mc_addr, ++ uint64_t fence_mc_addr, ++ int index) ++{ ++ unsigned int psp_write_ptr_reg = 0; ++ struct psp_gfx_rb_frame *write_frame = psp->km_ring.ring_mem; ++ struct psp_ring *ring = &psp->km_ring; ++ struct psp_gfx_rb_frame *ring_buffer_start = ring->ring_mem; ++ struct psp_gfx_rb_frame *ring_buffer_end = ring_buffer_start + ++ ring->ring_size / sizeof(struct psp_gfx_rb_frame) - 1; ++ struct amdgpu_device *adev = psp->adev; ++ uint32_t ring_size_dw = ring->ring_size / 4; ++ uint32_t rb_frame_size_dw = sizeof(struct psp_gfx_rb_frame) / 4; ++ ++ /* KM (GPCOM) prepare write pointer */ ++ psp_write_ptr_reg = psp_ring_get_wptr(psp); ++ ++ /* Update KM RB frame pointer to new frame */ ++ /* write_frame ptr increments by size of rb_frame in bytes */ ++ /* psp_write_ptr_reg increments by size of rb_frame in DWORDs */ ++ if ((psp_write_ptr_reg % ring_size_dw) == 0) ++ write_frame = ring_buffer_start; ++ else ++ write_frame = ring_buffer_start + (psp_write_ptr_reg / rb_frame_size_dw); ++ /* Check invalid write_frame ptr address */ ++ if ((write_frame < ring_buffer_start) || (ring_buffer_end < write_frame)) { ++ DRM_ERROR("ring_buffer_start = %p; ring_buffer_end = %p; write_frame = %p\n", ++ ring_buffer_start, ring_buffer_end, write_frame); ++ DRM_ERROR("write_frame is pointing to address out of bounds\n"); ++ return -EINVAL; ++ } ++ ++ /* Initialize KM RB frame */ ++ memset(write_frame, 0, sizeof(struct psp_gfx_rb_frame)); ++ ++ /* Update KM RB frame */ ++ write_frame->cmd_buf_addr_hi = upper_32_bits(cmd_buf_mc_addr); ++ write_frame->cmd_buf_addr_lo = lower_32_bits(cmd_buf_mc_addr); ++ write_frame->fence_addr_hi = upper_32_bits(fence_mc_addr); ++ write_frame->fence_addr_lo = lower_32_bits(fence_mc_addr); ++ write_frame->fence_value = index; ++ amdgpu_asic_flush_hdp(adev, NULL); ++ ++ /* Update the write Pointer in DWORDs */ ++ psp_write_ptr_reg = (psp_write_ptr_reg + rb_frame_size_dw) % ring_size_dw; ++ psp_ring_set_wptr(psp, psp_write_ptr_reg); ++ return 0; ++} ++ + static bool psp_check_fw_loading_status(struct amdgpu_device *adev, + enum AMDGPU_UCODE_ID ucode_type) + { +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h +index d5620c46f3fc..482e7675b7da 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h +@@ -377,4 +377,8 @@ int psp_rlc_autoload_start(struct psp_context *psp); + extern const struct amdgpu_ip_block_version psp_v11_0_ip_block; + int psp_reg_program(struct psp_context *psp, enum psp_reg_prog_id reg, + uint32_t value); ++int psp_ring_cmd_submit(struct psp_context *psp, ++ uint64_t cmd_buf_mc_addr, ++ uint64_t fence_mc_addr, ++ int index); + #endif +-- +2.17.1 + |