diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4480-drm-amd-display-Add-DMUB-service-function-check-if-h.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4480-drm-amd-display-Add-DMUB-service-function-check-if-h.patch | 123 |
1 files changed, 123 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4480-drm-amd-display-Add-DMUB-service-function-check-if-h.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4480-drm-amd-display-Add-DMUB-service-function-check-if-h.patch new file mode 100644 index 00000000..491b8909 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4480-drm-amd-display-Add-DMUB-service-function-check-if-h.patch @@ -0,0 +1,123 @@ +From c5f567be2f430aa3e888240f0fab5b90fac832bf Mon Sep 17 00:00:00 2001 +From: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Date: Tue, 29 Oct 2019 14:23:55 -0400 +Subject: [PATCH 4480/4736] drm/amd/display: Add DMUB service function check if + hw initialized + +[Why] +We want to avoid reprogramming the cache window when possible. + +We don't need to worry about it for S3 but we *do* need to worry about +it for S4 resume. + +DM can check whether hardware should be reinitialized or store software +state when going to S4 to know whether we need to reprogram hardware. + +[How] +Add helpers to the DMUB service to check hardware initialization state. + +DM will hook it up later. + +Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> +Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> +Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> +--- + drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h | 11 +++++++++++ + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 5 +++++ + drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h | 2 ++ + drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 14 ++++++++++++++ + 4 files changed, 32 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h +index aa8f0396616d..76e80138303b 100644 +--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h ++++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_srv.h +@@ -252,6 +252,8 @@ struct dmub_srv_hw_funcs { + + bool (*is_supported)(struct dmub_srv *dmub); + ++ bool (*is_hw_init)(struct dmub_srv *dmub); ++ + bool (*is_phy_init)(struct dmub_srv *dmub); + + bool (*is_auto_load_done)(struct dmub_srv *dmub); +@@ -380,6 +382,15 @@ enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, + enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, + bool *is_supported); + ++/** ++ * dmub_srv_is_hw_init() - returns hardware init state ++ * ++ * Return: ++ * DMUB_STATUS_OK - success ++ * DMUB_STATUS_INVALID - unspecified error ++ */ ++enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init); ++ + /** + * dmub_srv_hw_init() - initializes the underlying DMUB hardware + * @dmub: the dmub service +diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +index 236a4156bbe1..89fd27758dd5 100644 +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +@@ -122,6 +122,11 @@ void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) + REG_WRITE(DMCUB_INBOX1_WPTR, wptr_offset); + } + ++bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub) ++{ ++ return REG_READ(DMCUB_REGION3_CW2_BASE_ADDRESS) != 0; ++} ++ + bool dmub_dcn20_is_supported(struct dmub_srv *dmub) + { + uint32_t supported = 0; +diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h +index 41269da40363..e1ba748ca594 100644 +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h +@@ -55,6 +55,8 @@ uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub); + + void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset); + ++bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub); ++ + bool dmub_dcn20_is_supported(struct dmub_srv *dmub); + + bool dmub_dcn20_is_phy_init(struct dmub_srv *dmub); +diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +index 229eab7277d1..2d63ae80bda9 100644 +--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c ++++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +@@ -76,6 +76,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) + funcs->set_inbox1_wptr = dmub_dcn20_set_inbox1_wptr; + funcs->is_supported = dmub_dcn20_is_supported; + funcs->is_phy_init = dmub_dcn20_is_phy_init; ++ funcs->is_hw_init = dmub_dcn20_is_hw_init; + + if (asic == DMUB_ASIC_DCN21) { + funcs->backdoor_load = dmub_dcn21_backdoor_load; +@@ -234,6 +235,19 @@ enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, + return DMUB_STATUS_OK; + } + ++enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init) ++{ ++ *is_hw_init = false; ++ ++ if (!dmub->sw_init) ++ return DMUB_STATUS_INVALID; ++ ++ if (dmub->hw_funcs.is_hw_init) ++ *is_hw_init = dmub->hw_funcs.is_hw_init(dmub); ++ ++ return DMUB_STATUS_OK; ++} ++ + enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, + const struct dmub_srv_hw_params *params) + { +-- +2.17.1 + |