diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4478-drm-amd-display-Fix-stereo-with-DCC-enabled.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4478-drm-amd-display-Fix-stereo-with-DCC-enabled.patch | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4478-drm-amd-display-Fix-stereo-with-DCC-enabled.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4478-drm-amd-display-Fix-stereo-with-DCC-enabled.patch new file mode 100644 index 00000000..2f7c0d11 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4478-drm-amd-display-Fix-stereo-with-DCC-enabled.patch @@ -0,0 +1,81 @@ +From 385499bca1590635946ebbfe750900f92baaf8b5 Mon Sep 17 00:00:00 2001 +From: Samson Tam <Samson.Tam@amd.com> +Date: Wed, 23 Oct 2019 21:36:29 -0400 +Subject: [PATCH 4478/4736] drm/amd/display: Fix stereo with DCC enabled + +[Why] +When sending DCC with Stereo, DCC gets enabled but the meta addresses +are 0. This happens momentarily before the meta addresses are populated +with a valid address. + +[How] +Add call validate_dcc_with_meta_address() in +copy_surface_update_to_plane() to check for surface address and DCC +change. +When DCC has changed, check if DCC enable is true but meta address is 0. +If so, we turn DCC enable to false. When surface address has changed, we +check if DCC enable is false but meta address is not 0. If so, we turn +DCC enable back to true. This will restore DCC enable to the proper +setting once the meta address is valid. + +Signed-off-by: Samson Tam <Samson.Tam@amd.com> +Reviewed-by: Jun Lei <Jun.Lei@amd.com> +Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 27 ++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c +index 9e600d3e2fd8..7a2cdf21ca34 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -1764,12 +1764,37 @@ static struct dc_stream_status *stream_get_status( + + static const enum surface_update_type update_surface_trace_level = UPDATE_TYPE_FULL; + ++static void validate_dcc_with_meta_address( ++ struct dc_plane_dcc_param *dcc, ++ struct dc_plane_address *address) ++{ ++ if ((address->grph.meta_addr.quad_part == 0) && ++ dcc->enable) { ++ ASSERT(!dcc->enable); ++ dcc->enable = false; ++ } else if ((address->grph.meta_addr.quad_part != 0) && ++ !dcc->enable) ++ dcc->enable = true; ++ ++ if (address->type != PLN_ADDR_TYPE_GRAPHICS) { ++ if ((address->grph_stereo.right_meta_addr.quad_part == 0) && ++ dcc->enable) { ++ ASSERT(!dcc->enable); ++ dcc->enable = false; ++ } else if ((address->grph_stereo.right_meta_addr.quad_part != 0) && ++ !dcc->enable) ++ dcc->enable = true; ++ } ++} ++ + static void copy_surface_update_to_plane( + struct dc_plane_state *surface, + struct dc_surface_update *srf_update) + { + if (srf_update->flip_addr) { + surface->address = srf_update->flip_addr->address; ++ validate_dcc_with_meta_address(&surface->dcc, &surface->address); ++ + surface->flip_immediate = + srf_update->flip_addr->flip_immediate; + surface->time.time_elapsed_in_us[surface->time.index] = +@@ -1818,6 +1843,8 @@ static void copy_surface_update_to_plane( + srf_update->plane_info->global_alpha_value; + surface->dcc = + srf_update->plane_info->dcc; ++ validate_dcc_with_meta_address(&surface->dcc, &surface->address); ++ + surface->sdr_white_level = + srf_update->plane_info->sdr_white_level; + surface->layer_index = +-- +2.17.1 + |