diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4352-drm-amd-display-Create-debug-option-to-disable-v.act.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4352-drm-amd-display-Create-debug-option-to-disable-v.act.patch | 126 |
1 files changed, 126 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4352-drm-amd-display-Create-debug-option-to-disable-v.act.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4352-drm-amd-display-Create-debug-option-to-disable-v.act.patch new file mode 100644 index 00000000..28390086 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4352-drm-amd-display-Create-debug-option-to-disable-v.act.patch @@ -0,0 +1,126 @@ +From 1125f87a7e9aa35f7a84916c067faf57784eca38 Mon Sep 17 00:00:00 2001 +From: David Galiffi <David.Galiffi@amd.com> +Date: Tue, 1 Oct 2019 18:29:56 -0400 +Subject: [PATCH 4352/4736] drm/amd/display: Create debug option to disable + v.active clock change policy. + +[WHY] +It has been a useful option in debugging GFXOFF and P.State Change issues. +May be required as for platform specific workaround. + +[HOW] +Create option in enum dc_debug_options, "disable_vactive_clock_change". +When it is set, dm_dram_clock_change_vactive, will translate into +p_state_change_support: false. + +Signed-off-by: David Galiffi <David.Galiffi@amd.com> +Reviewed-by: Jun Lei <Jun.Lei@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dc.h | 1 + + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1 + + .../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c | 3 ++- + .../drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 6 +++--- + drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h | 1 + + drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 ++ + drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 + + 7 files changed, 11 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index 5d47871ff19c..cc45d77a3b0d 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -423,6 +423,7 @@ struct dc_debug_options { + int force_clock_mode;/*every mode change.*/ + + bool nv12_iflip_vm_wa; ++ bool disable_dram_clock_change_vactive_support; + }; + + struct dc_debug_data { +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index ef43faa09eb3..19a4838b1ac2 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2848,6 +2848,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, + bool full_pstate_supported = false; + bool dummy_pstate_supported = false; + double p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us; ++ context->bw_ctx.dml.soc.disable_dram_clock_change_vactive_support = dc->debug.disable_dram_clock_change_vactive_support; + + if (fast_validate) + return dcn20_validate_bandwidth_internal(dc, context, true); +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c +index 6c6c486b774a..77b7574c63cb 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c +@@ -2577,7 +2577,8 @@ static void dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer + mode_lib->vba.MinActiveDRAMClockChangeMargin + + mode_lib->vba.DRAMClockChangeLatency; + +- if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) { ++ if (mode_lib->vba.DRAMClockChangeSupportsVActive && ++ mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) { + mode_lib->vba.DRAMClockChangeWatermark += 25; + mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; + } else { +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c +index d63ca4ccf7cf..62dfd36d830a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c +@@ -2611,12 +2611,12 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP + mode_lib->vba.MinActiveDRAMClockChangeMargin + + mode_lib->vba.DRAMClockChangeLatency; + +- +- if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) { ++ if (mode_lib->vba.DRAMClockChangeSupportsVActive && ++ mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) { + mode_lib->vba.DRAMClockChangeWatermark += 25; + mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; + } else if (mode_lib->vba.DummyPStateCheck && +- mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) { ++ mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) { + mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; + } else { + if (mode_lib->vba.SynchronizedVBlank || mode_lib->vba.NumberOfActivePlanes == 1) { +diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h +index cfacd6027467..19356180cbb6 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h ++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h +@@ -112,6 +112,7 @@ struct _vcs_dpi_soc_bounding_box_st { + bool do_urgent_latency_adjustment; + double urgent_latency_adjustment_fabric_clock_component_us; + double urgent_latency_adjustment_fabric_clock_reference_mhz; ++ bool disable_dram_clock_change_vactive_support; + }; + + struct _vcs_dpi_ip_params_st { +diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +index 81db8517a690..da5e9d2fd6b6 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +@@ -223,6 +223,8 @@ static void fetch_socbb_params(struct display_mode_lib *mode_lib) + mode_lib->vba.SREnterPlusExitTime = soc->sr_enter_plus_exit_time_us; + mode_lib->vba.DRAMClockChangeLatency = soc->dram_clock_change_latency_us; + mode_lib->vba.DummyPStateCheck = soc->dram_clock_change_latency_us == soc->dummy_pstate_latency_us; ++ mode_lib->vba.DRAMClockChangeSupportsVActive = !soc->disable_dram_clock_change_vactive_support || ++ mode_lib->vba.DummyPStateCheck; + + mode_lib->vba.Downspreading = soc->downspread_percent; + mode_lib->vba.DRAMChannelWidth = soc->dram_channel_width_bytes; // new! +diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h +index 6c59a332093a..6d8b5c61de68 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h ++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h +@@ -156,6 +156,7 @@ struct vba_vars_st { + unsigned int DSCFormatFactor; + + bool DummyPStateCheck; ++ bool DRAMClockChangeSupportsVActive; + bool PrefetchModeSupported; + enum self_refresh_affinity AllowDRAMSelfRefreshOrDRAMClockChangeInVblank; // Mode Support only + double XFCRemoteSurfaceFlipDelay; +-- +2.17.1 + |