diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4262-drm-amd-display-fix-hubbub-deadline-programing.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4262-drm-amd-display-fix-hubbub-deadline-programing.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4262-drm-amd-display-fix-hubbub-deadline-programing.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4262-drm-amd-display-fix-hubbub-deadline-programing.patch new file mode 100644 index 00000000..03552f62 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4262-drm-amd-display-fix-hubbub-deadline-programing.patch @@ -0,0 +1,44 @@ +From 3e524c60423cee992127ddc9487298a65bffb782 Mon Sep 17 00:00:00 2001 +From: Eric Yang <Eric.Yang2@amd.com> +Date: Thu, 10 Oct 2019 11:25:48 -0400 +Subject: [PATCH 4262/4736] drm/amd/display: fix hubbub deadline programing + +[Why] +Fix the programming of DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A. +Was not filled in. + +Signed-off-by: Eric Yang <Eric.Yang2@amd.com> +Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1 + + drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index 9c96242f0ad9..b6ec81096d3a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2632,6 +2632,7 @@ static void dcn20_calculate_wm( + #if defined(CONFIG_DRM_AMD_DC_DCN2_1) + context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; + context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; ++ context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; + #endif + + if (vlevel < 2) { +diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c +index 910c850701af..ff32c7380efb 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c +@@ -1009,6 +1009,7 @@ static void calculate_wm_set_for_vlevel( + #if defined(CONFIG_DRM_AMD_DC_DCN2_1) + wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; + wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; ++ wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; + #endif + dml->soc.dram_clock_change_latency_us = dram_clock_change_latency_cached; + +-- +2.17.1 + |