diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4184-drm-amd-display-update-dcn21-hubbub-registers.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4184-drm-amd-display-update-dcn21-hubbub-registers.patch | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4184-drm-amd-display-update-dcn21-hubbub-registers.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4184-drm-amd-display-update-dcn21-hubbub-registers.patch new file mode 100644 index 00000000..3f1d24ed --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4184-drm-amd-display-update-dcn21-hubbub-registers.patch @@ -0,0 +1,59 @@ +From 32559e89cd648263466d70e07de915d1409a9a49 Mon Sep 17 00:00:00 2001 +From: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Date: Thu, 3 Oct 2019 13:38:57 -0400 +Subject: [PATCH 4184/4736] drm/amd/display: update dcn21 hubbub registers + +use dcn20 common regs define to share some regs with dcn20 + +Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Reviewed-by: Roman Li <Roman.Li@amd.com> +--- + .../gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h | 17 +++++++---------- + 1 file changed, 7 insertions(+), 10 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h +index 698c470cc0f6..c4840dfb1fa5 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.h +@@ -36,6 +36,10 @@ + SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B),\ + SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C),\ + SR(DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D),\ ++ SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A),\ ++ SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_B),\ ++ SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_C),\ ++ SR(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D),\ + SR(DCHUBBUB_ARB_HOSTVM_CNTL), \ + SR(DCHVM_CTRL0), \ + SR(DCHVM_MEM_CTRL), \ +@@ -44,16 +48,9 @@ + SR(DCHVM_RIOMMU_STAT0) + + #define HUBBUB_REG_LIST_DCN21()\ +- HUBBUB_REG_LIST_DCN_COMMON(), \ ++ HUBBUB_REG_LIST_DCN20_COMMON(), \ + HUBBUB_SR_WATERMARK_REG_LIST(), \ +- HUBBUB_HVM_REG_LIST(), \ +- SR(DCHUBBUB_CRC_CTRL), \ +- SR(DCN_VM_FB_LOCATION_BASE),\ +- SR(DCN_VM_FB_LOCATION_TOP),\ +- SR(DCN_VM_FB_OFFSET),\ +- SR(DCN_VM_AGP_BOT),\ +- SR(DCN_VM_AGP_TOP),\ +- SR(DCN_VM_AGP_BASE) ++ HUBBUB_HVM_REG_LIST() + + #define HUBBUB_MASK_SH_LIST_HVM(mask_sh) \ + HUBBUB_SF(DCHUBBUB_ARB_DF_REQ_OUTSTAND, DCHUBBUB_ARB_MIN_REQ_OUTSTAND_COMMIT_THRESHOLD, mask_sh), \ +@@ -102,7 +99,7 @@ + HUBBUB_SF(DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_D, mask_sh) + + #define HUBBUB_MASK_SH_LIST_DCN21(mask_sh)\ +- HUBBUB_MASK_SH_LIST_HVM(mask_sh),\ ++ HUBBUB_MASK_SH_LIST_HVM(mask_sh), \ + HUBBUB_MASK_SH_LIST_DCN_COMMON(mask_sh), \ + HUBBUB_MASK_SH_LIST_STUTTER(mask_sh), \ + HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ +-- +2.17.1 + |