diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4151-drm-amdgpu-add-new-BIF-5.0-register-for-BACO.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4151-drm-amdgpu-add-new-BIF-5.0-register-for-BACO.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4151-drm-amdgpu-add-new-BIF-5.0-register-for-BACO.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4151-drm-amdgpu-add-new-BIF-5.0-register-for-BACO.patch new file mode 100644 index 00000000..bae6f731 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4151-drm-amdgpu-add-new-BIF-5.0-register-for-BACO.patch @@ -0,0 +1,44 @@ +From 58c05ba33e4ff776d63e782cf1d41af513c4732e Mon Sep 17 00:00:00 2001 +From: Alex Deucher <alexander.deucher@amd.com> +Date: Mon, 11 Feb 2019 12:28:45 -0500 +Subject: [PATCH 4151/4736] drm/amdgpu: add new BIF 5.0 register for BACO +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Reviewed-by: Evan Quan <evan.quan@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h | 1 + + drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h | 2 ++ + 2 files changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h +index 809759f7bb81..8d05d6ca1c8d 100644 +--- a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h ++++ b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h +@@ -27,6 +27,7 @@ + #define mmMM_INDEX 0x0 + #define mmMM_INDEX_HI 0x6 + #define mmMM_DATA 0x1 ++#define mmCC_BIF_BX_FUSESTRAP0 0x14D7 + #define mmCC_BIF_BX_STRAP2 0x152A + #define mmBIF_MM_INDACCESS_CNTL 0x1500 + #define mmBIF_DOORBELL_APER_EN 0x1501 +diff --git a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h +index adc71b01f793..73435687d049 100644 +--- a/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h ++++ b/drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h +@@ -32,6 +32,8 @@ + #define MM_INDEX_HI__MM_OFFSET_HI__SHIFT 0x0 + #define MM_DATA__MM_DATA_MASK 0xffffffff + #define MM_DATA__MM_DATA__SHIFT 0x0 ++#define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK 0x2 ++#define CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE__SHIFT 0x1 + #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS_MASK 0x2 + #define BIF_MM_INDACCESS_CNTL__MM_INDACCESS_DIS__SHIFT 0x1 + #define BIF_DOORBELL_APER_EN__BIF_DOORBELL_APER_EN_MASK 0x1 +-- +2.17.1 + |