aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx7d-nitrogen7.dts
blob: ecfa179ccab1cc690fb71d58e552d116e8848608 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
// SPDX-License-Identifier: GPL-2.0 OR X11
/*
 * Copyright 2016 Boundary Devices, Inc.
 */

/dts-v1/;

#include "imx7d.dtsi"

/ {
	model = "Boundary Devices i.MX7 Nitrogen7 Board";
	compatible = "boundary,imx7d-nitrogen7", "fsl,imx7d";

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};

	backlight-j9 {
		compatible = "gpio-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight_j9>;
		gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
		default-on;
	};

	backlight_lcd: backlight-j20 {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000 0>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
		status = "okay";
	};

	panel-lcd {
		compatible = "okaya,rs800480t-7x0gp";
		backlight = <&backlight_lcd>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lcdif_out>;
			};
		};
	};

	reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg1_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb_otg2_vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	reg_can2_3v3: regulator-can2-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "can2-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio2 14 GPIO_ACTIVE_LOW>;
	};

	reg_vref_1v8: regulator-vref-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "vref-1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_vref_3v3: regulator-vref-3v3 {
		compatible = "regulator-fixed";
		regulator-name = "vref-3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_wlan: regulator-wlan {
		compatible = "regulator-fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-name = "reg_wlan";
		startup-delay-us = <70000>;
		gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	usdhc2_pwrseq: usdhc2_pwrseq {
		compatible = "mmc-pwrseq-simple";
		clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
		clock-names = "ext_clock";
	};
};

&adc1 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&adc2 {
	vref-supply = <&reg_vref_1v8>;
	status = "okay";
};

&clks {
	assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
			  <&clks IMX7D_CLKO2_ROOT_DIV>;
	assigned-clock-parents = <&clks IMX7D_CKIL>;
	assigned-clock-rates = <0>, <32768>;
};

&cpu0 {
	cpu-supply = <&sw1a_reg>;
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
			  <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
	assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
	assigned-clock-rates = <0>, <100000000>;
	phy-mode = "rgmii";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@4 {
			reg = <4>;
		};
	};
};

&flexcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan2>;
	xceiver-supply = <&reg_can2_3v3>;
	status = "okay";
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: pfuze3000@8 {
		compatible = "fsl,pfuze3000";
		reg = <0x08>;

		regulators {
			sw1a_reg: sw1a {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			/* use sw1c_reg to align with pfuze100/pfuze200 */
			sw1c_reg: sw1b {
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1475000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <6250>;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1500000>;
				regulator-max-microvolt = <1850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			sw3a_reg: sw3 {
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1650000>;
				regulator-boot-on;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-boot-on;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-boot-on;
				regulator-always-on;
			};

			vgen1_reg: vldo1 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen2_reg: vldo2 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
				regulator-always-on;
			};

			vgen3_reg: vccsd {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen4_reg: v33 {
				regulator-min-microvolt = <2850000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen5_reg: vldo3 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};

			vgen6_reg: vldo4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
			};
		};
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	rtc@68 {
		compatible = "microcrystal,rv4162";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c2_rv4162>;
		reg = <0x68>;
		interrupts-extended = <&gpio2 15 IRQ_TYPE_LEVEL_LOW>;
	};
};

&i2c3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "okay";

	touch@48 {
		compatible = "ti,tsc2004";
		reg = <0x48>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3_tsc2004>;
		interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
		wakeup-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
	};
};

&i2c4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";

	codec: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>;
		clock-names = "mclk";
		wlf,shared-lrclk;
	};
};

&lcdif {
	status = "okay";

	port {
		lcdif_out: endpoint {
			remote-endpoint = <&panel_in>;
		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	status = "okay";
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
	uart-has-rtscts;
	status = "okay";
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg1>;
	status = "okay";
};

&usbotg2 {
	vbus-supply = <&reg_usb_otg2_vbus>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg2>;
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&vgen3_reg>;
	bus-width = <4>;
	fsl,tuning-step = <2>;
	wakeup-source;
	keep-power-in-suspend;
	status = "okay";
};

&usdhc2 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_wlan>;
	mmc-pwrseq = <&usdhc2_pwrseq>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";

	wlcore: wlcore@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		interrupt-parent = <&gpio4>;
		interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
	};
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
	assigned-clock-rates = <400000000>;
	bus-width = <8>;
	fsl,tuning-step = <2>;
	non-removable;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog1>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_1 &pinctrl_j2>;

	pinctrl_hog_1: hoggrp-1 {
		fsl,pins = <
			MX7D_PAD_SD3_RESET_B__GPIO6_IO11	0x5d
			MX7D_PAD_GPIO1_IO13__GPIO1_IO13		0x7d
			MX7D_PAD_ECSPI2_MISO__GPIO4_IO22	0x7d
		>;
	};

	pinctrl_enet1: enet1grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x3
			MX7D_PAD_GPIO1_IO11__ENET1_MDC			0x3
			MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1		0x3
			MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC	0x71
			MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0	0x71
			MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1	0x71
			MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2	0x71
			MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3	0x71
			MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL	0x71
			MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC	0x71
			MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0	0x11
			MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1	0x11
			MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2	0x11
			MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3	0x71
			MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL	0x11
			MX7D_PAD_SD3_STROBE__GPIO6_IO10			0x75
		>;
	};

	pinctrl_flexcan2: flexcan2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX	0x7d
			MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX	0x7d
			MX7D_PAD_EPDC_DATA14__GPIO2_IO14	0x7d
		>;
	};

	pinctrl_i2c1: i2c1grp {
		fsl,pins = <
			MX7D_PAD_I2C1_SDA__I2C1_SDA		0x4000007f
			MX7D_PAD_I2C1_SCL__I2C1_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SDA__I2C2_SDA		0x4000007f
			MX7D_PAD_I2C2_SCL__I2C2_SCL		0x4000007f
		>;
	};

	pinctrl_i2c2_rv4162: i2c2-rv4162grp {
		fsl,pins = <
			MX7D_PAD_EPDC_DATA15__GPIO2_IO15	0x7d
		>;
	};

	pinctrl_i2c3: i2c3grp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__I2C3_SDA		0x4000007f
			MX7D_PAD_I2C3_SCL__I2C3_SCL		0x4000007f
		>;
	};

	pinctrl_i2c3_tsc2004: i2c3tsc2004grp {
		fsl,pins = <
			MX7D_PAD_LCD_RESET__GPIO3_IO4		0x79
			MX7D_PAD_SD2_WP__GPIO5_IO10		0x7d
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX7D_PAD_I2C4_SDA__I2C4_SDA		0x4000007f
			MX7D_PAD_I2C4_SCL__I2C4_SCL		0x4000007f
		>;
	};

	pinctrl_j2: j2grp {
		fsl,pins = <
			MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15	0x7d
			MX7D_PAD_EPDC_BDR0__GPIO2_IO28		0x7d
			MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12	0x7d
			MX7D_PAD_EPDC_BDR1__GPIO2_IO29		0x7d
			MX7D_PAD_SD1_WP__GPIO5_IO1		0x7d
			MX7D_PAD_EPDC_SDSHR__GPIO2_IO19		0x7d
			MX7D_PAD_SD1_RESET_B__GPIO5_IO2		0x7d
			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x7d
			MX7D_PAD_EPDC_DATA07__GPIO2_IO7		0x7d
			MX7D_PAD_EPDC_DATA08__GPIO2_IO8		0x7d
			MX7D_PAD_EPDC_DATA09__GPIO2_IO9		0x7d
			MX7D_PAD_EPDC_DATA10__GPIO2_IO10	0x7d
			MX7D_PAD_EPDC_DATA11__GPIO2_IO11	0x7d
			MX7D_PAD_EPDC_DATA12__GPIO2_IO12	0x7d
			MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14	0x7d
			MX7D_PAD_EPDC_DATA13__GPIO2_IO13	0x7d
			MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13	0x7d
			MX7D_PAD_SD2_CD_B__GPIO5_IO9		0x7d
			MX7D_PAD_EPDC_GDCLK__GPIO2_IO24		0x7d
			MX7D_PAD_SAI2_RX_DATA__GPIO6_IO21	0x7d
			MX7D_PAD_EPDC_GDOE__GPIO2_IO25		0x7d
			MX7D_PAD_EPDC_GDRL__GPIO2_IO26		0x7d
			MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22	0x7d
			MX7D_PAD_EPDC_SDCE0__GPIO2_IO20		0x7d
			MX7D_PAD_SAI2_TX_BCLK__GPIO6_IO20	0x7d
			MX7D_PAD_EPDC_SDCE1__GPIO2_IO21		0x7d
			MX7D_PAD_SAI2_TX_SYNC__GPIO6_IO19	0x7d
			MX7D_PAD_EPDC_SDCE2__GPIO2_IO22		0x7d
			MX7D_PAD_EPDC_SDCE3__GPIO2_IO23		0x7d
			MX7D_PAD_EPDC_GDSP__GPIO2_IO27		0x7d
			MX7D_PAD_EPDC_SDCLK__GPIO2_IO16		0x7d
			MX7D_PAD_EPDC_SDLE__GPIO2_IO17		0x7d
			MX7D_PAD_EPDC_SDOE__GPIO2_IO18		0x7d
			MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30	0x7d
			MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31	0x7d
		>;
	};

	pinctrl_lcdif_dat: lcdifdatgrp {
		fsl,pins = <
			MX7D_PAD_LCD_DATA00__LCD_DATA0		0x79
			MX7D_PAD_LCD_DATA01__LCD_DATA1		0x79
			MX7D_PAD_LCD_DATA02__LCD_DATA2		0x79
			MX7D_PAD_LCD_DATA03__LCD_DATA3		0x79
			MX7D_PAD_LCD_DATA04__LCD_DATA4		0x79
			MX7D_PAD_LCD_DATA05__LCD_DATA5		0x79
			MX7D_PAD_LCD_DATA06__LCD_DATA6		0x79
			MX7D_PAD_LCD_DATA07__LCD_DATA7		0x79
			MX7D_PAD_LCD_DATA08__LCD_DATA8		0x79
			MX7D_PAD_LCD_DATA09__LCD_DATA9		0x79
			MX7D_PAD_LCD_DATA10__LCD_DATA10		0x79
			MX7D_PAD_LCD_DATA11__LCD_DATA11		0x79
			MX7D_PAD_LCD_DATA12__LCD_DATA12		0x79
			MX7D_PAD_LCD_DATA13__LCD_DATA13		0x79
			MX7D_PAD_LCD_DATA14__LCD_DATA14		0x79
			MX7D_PAD_LCD_DATA15__LCD_DATA15		0x79
			MX7D_PAD_LCD_DATA16__LCD_DATA16		0x79
			MX7D_PAD_LCD_DATA17__LCD_DATA17		0x79
			MX7D_PAD_LCD_DATA18__LCD_DATA18		0x79
			MX7D_PAD_LCD_DATA19__LCD_DATA19		0x79
			MX7D_PAD_LCD_DATA20__LCD_DATA20		0x79
			MX7D_PAD_LCD_DATA21__LCD_DATA21		0x79
			MX7D_PAD_LCD_DATA22__LCD_DATA22		0x79
			MX7D_PAD_LCD_DATA23__LCD_DATA23		0x79
		>;
	};

	pinctrl_lcdif_ctrl: lcdifctrlgrp {
		fsl,pins = <
			MX7D_PAD_LCD_CLK__LCD_CLK		0x79
			MX7D_PAD_LCD_ENABLE__LCD_ENABLE		0x79
			MX7D_PAD_LCD_VSYNC__LCD_VSYNC		0x79
			MX7D_PAD_LCD_HSYNC__LCD_HSYNC		0x79
		>;
	};

	pinctrl_pwm2: pwm2grp {
		fsl,pins = <
			MX7D_PAD_GPIO1_IO09__PWM2_OUT		0x7d
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX	0x79
			MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX	0x79
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX	0x79
			MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX	0x79
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX	0x79
			MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX	0x79
			MX7D_PAD_EPDC_DATA04__GPIO2_IO4		0x7d
		>;
	};

	pinctrl_uart6: uart6grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX	0x79
			MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX	0x79
			MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS	0x79
			MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS	0x79
		>;
	};

	pinctrl_usbotg2: usbotg2grp {
		fsl,pins = <
			MX7D_PAD_UART3_RTS_B__USB_OTG2_OC	0x7d
			MX7D_PAD_UART3_CTS_B__GPIO4_IO7		0x14
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX7D_PAD_SD1_CMD__SD1_CMD		0x59
			MX7D_PAD_SD1_CLK__SD1_CLK		0x19
			MX7D_PAD_SD1_DATA0__SD1_DATA0		0x59
			MX7D_PAD_SD1_DATA1__SD1_DATA1		0x59
			MX7D_PAD_SD1_DATA2__SD1_DATA2		0x59
			MX7D_PAD_SD1_DATA3__SD1_DATA3		0x59
			MX7D_PAD_GPIO1_IO08__SD1_VSELECT	0x75
			MX7D_PAD_SD1_CD_B__GPIO5_IO0		0x75
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX7D_PAD_SD2_CMD__SD2_CMD		0x59
			MX7D_PAD_SD2_CLK__SD2_CLK		0x19
			MX7D_PAD_SD2_DATA0__SD2_DATA0		0x59
			MX7D_PAD_SD2_DATA1__SD2_DATA1		0x59
			MX7D_PAD_SD2_DATA2__SD2_DATA2		0x59
			MX7D_PAD_SD2_DATA3__SD2_DATA3		0x59
			MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20	0x59
			MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21	0x59
		>;
	};

	pinctrl_usdhc3: usdhc3grp {
		fsl,pins = <
			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
			MX7D_PAD_SD3_CLK__SD3_CLK		0x19
			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
		>;
	};
};

&iomuxc_lpsr {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_2>;

	pinctrl_hog_2: hoggrp-2 {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2	0x7d
			MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2	0x7d
		>;
	};

	pinctrl_backlight_j9: backlightj9grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7	0x7d
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT	0x7d
		>;
	};

	pinctrl_usbotg1: usbotg1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC	0x7d
			MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5	0x14
		>;
	};

	pinctrl_wdog1: wdog1grp {
		fsl,pins = <
			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x75
		>;
	};
};