// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board
 *
 * Copyright (C) 2016-2017 Renesas Electronics Corp.
 * Copyright (C) 2016 Cogent Embedded, Inc.
 */

/dts-v1/;
#include "r8a77951.dtsi"
#include "ulcb.dtsi"

/ {
	model = "Renesas H3ULCB board based on r8a77951";
	compatible = "renesas,h3ulcb", "renesas,r8a7795";

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x38000000>;
	};

	memory@500000000 {
		device_type = "memory";
		reg = <0x5 0x00000000 0x0 0x40000000>;
	};

	memory@600000000 {
		device_type = "memory";
		reg = <0x6 0x00000000 0x0 0x40000000>;
	};

	memory@700000000 {
		device_type = "memory";
		reg = <0x7 0x00000000 0x0 0x40000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* device specific region for Lossy Decompression */
		lossy_decompress: linux,lossy_decompress@54000000 {
			no-map;
			reg = <0x00000000 0x54000000 0x0 0x03000000>;
		};

		/* global autoconfigured region for contiguous allocations */
		linux,cma@57000000 {
			compatible = "shared-dma-pool";
			reusable;
			reg = <0x00000000 0x57000000 0x0 0x19000000>;
			linux,cma-default;
		};

		/* device specific region for contiguous allocations */
		mmp_reserved: linux,multimedia@70000000 {
			compatible = "shared-dma-pool";
			reusable;
			reg = <0x00000000 0x70000000 0x0 0x10000000>;
		};
	};
};

&du {
	clocks = <&cpg CPG_MOD 724>,
		 <&cpg CPG_MOD 723>,
		 <&cpg CPG_MOD 722>,
		 <&cpg CPG_MOD 721>,
		 <&versaclock5 1>,
		 <&versaclock5 3>,
		 <&versaclock5 4>,
		 <&versaclock5 2>;
	clock-names = "du.0", "du.1", "du.2", "du.3",
		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
};