/*
 * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
 */

/dts-v1/;
/plugin/;

/ {
	compatible = "brcm,bcm2835";

	fragment@0 {
		target = <&spidev0>;
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@1 {
		target = <&spidev1>;
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@2 {
		target-path = "spi1/spidev@0";
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@3 {
		target-path = "spi1/spidev@1";
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@4 {
		target-path = "spi1/spidev@2";
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@5 {
		target-path = "spi2/spidev@0";
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@6 {
		target-path = "spi2/spidev@1";
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@7 {
		target-path = "spi2/spidev@2";
		__dormant__ {
			status = "disabled";
		};
	};

	fragment@8 {
		target = <&spi0>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_00: mcp3202@0 {
				compatible = "mcp3202";
				reg = <0>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@9 {
		target = <&spi0>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_01: mcp3202@1 {
				compatible = "mcp3202";
				reg = <1>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@10 {
		target = <&spi1>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_10: mcp3202@0 {
				compatible = "mcp3202";
				reg = <0>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@11 {
		target = <&spi1>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_11: mcp3202@1 {
				compatible = "mcp3202";
				reg = <1>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@12 {
		target = <&spi1>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_12: mcp3202@2 {
				compatible = "mcp3202";
				reg = <2>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@13 {
		target = <&spi2>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_20: mcp3202@0 {
				compatible = "mcp3202";
				reg = <0>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@14 {
		target = <&spi2>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_21: mcp3202@1 {
				compatible = "mcp3202";
				reg = <1>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	fragment@15 {
		target = <&spi2>;
		__dormant__ {
			status = "okay";
			#address-cells = <1>;
			#size-cells = <0>;

			mcp3202_22: mcp3202@2 {
				compatible = "mcp3202";
				reg = <2>;
				spi-max-frequency = <1600000>;
			};
		};
	};

	__overrides__ {
		spi0-0-present = <0>, "+0+8";
		spi0-1-present = <0>, "+1+9";
		spi1-0-present = <0>, "+2+10";
		spi1-1-present = <0>, "+3+11";
		spi1-2-present = <0>, "+4+12";
		spi2-0-present = <0>, "+5+13";
		spi2-1-present = <0>, "+6+14";
		spi2-2-present = <0>, "+7+15";
		spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
		spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
		spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
		spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
		spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
		spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
		spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
		spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
	};
};