// SPDX-License-Identifier: GPL-2.0 // Copyright (C) 2003 INTEL Corporation /include/ "skeleton64.dtsi" / { interrupt-parent = <&gic>; aliases { gpio0 = &gpio0; gpio1 = &gpio1; serial0 = &serial0; serial1 = &serial1; serial2 = &serial2; serial3 = &serial3; ethernet0 = &femac; timer = &timer0; i2c0 = &i2c0; i2c1 = &i2c1; i2c2 = &i2c2; i2c3 = &i2c3; }; clocks { #address-cells = <1>; #size-cells = <0>; cpu { frequency = <0>; /* Filled in by the boot loader. */ }; peripheral { frequency = <0>; /* Filled in by the boot loader. */ }; emmc { frequency = <0>; /* Filled in by the boot loader. */ }; }; gic: interrupt-controller@2001001000 { compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; reg = <0x20 0x01001000 0 0x1000>, /* gic dist base */ <0x20 0x01002000 0 0x1000>, /* gic cpu base */ <0x20 0x01004000 0 0x2000>, /* vgic control */ <0x20 0x01006000 0 0x2000>, /* vgic cpu base */ <0x20 0x10030000 0 0x1000>, /* axm IPI mask reg base */ <0x20 0x10040000 0 0x20000>; /* axm IPI send reg base */ interrupts = <1 9 0xf04>; /* vgic for kvm */ }; timer { compatible = "arm,armv7-timer"; interrupts = <1 13 0xf08>, <1 14 0xf08>, <1 11 0xf08>, <1 10 0xf08>; }; edac: edac0@0x1000 { compatible = "axxia,edac"; reg = <0 0x00220000 0 0x1000>, <0 0x000f0000 0 0x1000>, <0x20 0x10030000 0 0001000>, <0x20 0x00200400 0 0001000>, <0x20 0x00210400 0 0001000>, <0x20 0x00220400 0 0001000>, <0x20 0x00230400 0 0001000>, <0x20 0x00240400 0 0001000>, <0x20 0x00250400 0 0001000>, <0x20 0x00260400 0 0001000>, <0x20 0x00270400 0 0001000>; interrupts = <0 160 4>, <0 161 4>; device_type = "edac"; status = "disabled"; }; ccn: ccn@0x2000000000 { compatible = "arm,ccn-504"; reg = <0x20 0x00000000 0 0x1000000>; interrupts = <0 181 4>; status = "disabled"; }; perf_platform: perf_platform { compatible = "axxia,axm-platformperf"; status = "disabled"; }; sm0: sm0@00220000 { compatible = "axxia,smmon"; reg = <0 0x00220000 0 0x1000>, <0x20 0x10030000 0 0001000>; interrupts = <0 161 4>; status = "disabled"; }; sm1: sm1@00220000 { compatible = "axxia,smmon"; reg = <0 0x000f0000 0 0x1000>, <0x20 0x10030000 0 0001000>; interrupts = <0 160 4>; status = "disabled"; }; femac: femac@0x2010120000 { compatible = "axxia,acp-femac"; device_type = "network"; reg = <0x20 0x10120000 0 0x1000>, <0x20 0x10121000 0 0x1000>, <0x20 0x10122000 0 0x1000>; interrupts = <0 2 4>, <0 3 4>, <0 4 4>; mac-address = [00 00 00 00 00 00]; status = "disabled"; }; mdio: mdio@10090000 { compatible = "axxia,axm-mdio", "axxia,axxia-mdio0"; #address-cells = <1>; #size-cells = <0>; reg = <0x20 0x10090000 0 0x1000>; status = "disabled"; }; soc { compatible = "simple-bus"; device_type = "soc"; #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&gic>; ranges; gpdma0: gpdma@2020140000 { compatible = "axxia,dma32"; reg = <0x20 0x20140000 0x00 0x1000>; interrupts = <0 60 4>, <0 61 4>; #dma-cells = <1>; channel0 { interrupts = <0 62 4>; }; channel1 { interrupts = <0 63 4>; }; }; gpdma1: gpdma@2020141000 { compatible = "axxia,dma32"; reg = <0x20 0x20141000 0x00 0x1000>; interrupts = <0 64 4>, <0 65 4>; #dma-cells = <1>; channel0 { interrupts = <0 66 4>; }; channel1 { interrupts = <0 67 4>; }; }; gpreg: gpreg@2010094000 { compatible = "axxia,gpreg"; reg = <0x20 0x10094000 0 0x1000>; }; pcie0: pcie@0x3000000000 { compatible = "axxia,plb-pciex"; device_type = "pci"; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; /* config space access MPAGE7 registers*/ reg = < 0x30 0x38000000 0x0 0x01000000 0x20 0x20120000 0x0 0x00008000 >; /* Outbound ranges */ /* < <3-cell PCI addr> *<2-cell CPU (PLB) addr> <2-cell size> > */ ranges = <0x03000000 0x00000000 0x80000000 0x30 0x00000000 0x00 0x20000000>; /* Inbound ranges */ /* < <3-cell PCI addr> *<2-cell CPU addr> <2-cell size> > */ dma-ranges = <0x03000000 0x00000000 0x00000000 0x00 0x00000000 0x00 0x40000000>; interrupts = <0 68 4>, <0 71 4>, <0 73 4>, <0 74 4>, <0 75 4>, <0 76 4>, <0 77 4>, <0 78 4>, <0 79 4>, <0 80 4>, <0 81 4>, <0 82 4>, <0 83 4>, <0 84 4>, <0 85 4>, <0 86 4>, <0 87 4>, <0 88 4>; port = <0>; status = "disabled"; }; pcie1: pcie@0x3080000000 { compatible = "axxia,plb-pciex"; device_type = "pci"; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; /* config space access MPAGE7 registers*/ reg = <0x30 0xb8000000 0x0 0x01000000 0x20 0x20130000 0x0 0x00008000 >; /* Outbound ranges */ /* < <3-cell PCI addr> *<2-cell CPU (PLB) addr> <2-cell size> > */ ranges = <0x03000000 0x00000000 0xc0000000 0x30 0x80000000 0x00 0x20000000>; /* Inbound ranges */ /* < <3-cell PCI addr> *<2-cell CPU addr> <2-cell size> > */ dma-ranges = <0x03000000 0x00000000 0x00000000 0x00 0x00000000 0x00 0x40000000>; interrupts = <0 70 4>, <0 72 4>; port = <1>; status = "disabled"; }; rio0: rapidio@0x3100000000 { index = <0>; #address-cells = <2>; #size-cells = <2>; compatible = "axxia,axxia-rapidio"; device_type = "rapidio"; reg = <0x0020 0x20142000 0x0 0x1000>; ranges = <0x0 0x0 0x0031 0x00000000 0x0 0x40000000>; linkdown-reset = <0x0200 0x100 0x0020 0x10000000 0x0 0x000010000>; interrupts = <0 89 4>; outb-dmes = <2 0x00000003 1 0x00000000>; enable_ds = <1>; status = "disabled"; }; rio1: rapidio@0x3140000000 { index = <1>; #address-cells = <2>; #size-cells = <2>; compatible = "axxia,axxia-rapidio"; device_type = "rapidio"; reg = <0x0020 0x20143000 0x0 0x1000>; ranges = <0x0 0x0 0x0031 0x40000000 0x0 0x40000000>; linkdown-reset = <0x0200 0x200 0x0020 0x10000000 0x0 0x000010000>; interrupts = <0 90 4>; outb-dmes = <2 0x00000003 1 0x00000000>; enable_ds = <1>; status = "disabled"; }; usb0: usb@004a4000 { compatible = "axxia,acp-usb"; device_type = "usb"; reg = <0x20 0x10140000 0x0 0020000>, <0x20 0x10094000 0x0 0002000>; interrupts = <0 55 4>; dma-coherent = <1>; status = "disabled"; }; i2c0: i2c@0x02010084000 { compatible = "axxia,api2c"; device_type = "i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x20 0x10084000 0x00 0x1000>; interrupts = <0 19 4>; status = "disabled"; }; i2c1: i2c@0x02010085000 { compatible = "axxia,api2c"; device_type = "i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x20 0x10085000 0x00 0x1000>; interrupts = <0 20 4>; status = "disabled"; }; i2c2: i2c@0x02010086000 { compatible = "axxia,api2c"; device_type = "i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x20 0x10086000 0x00 0x1000>; interrupts = <0 21 4>; status = "disabled"; }; i2c3: i2c@0x02010087000 { compatible = "axxia,api2c"; device_type = "i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x20 0x10087000 0x00 0x1000>; interrupts = <0 22 4>; status = "disabled"; }; mtc: mtc@0x2010098000 { compatible = "axxia,mtc"; reg = <0x20 0x10098000 0 0x3000>; interrupts = <0 45 4>; status = "disabled"; }; trng: trng@0x20101a0000 { compatible = "axxia,trng"; reg = <0x20 0x101a0000 0 0x20000>; interrupts = <0 8 4>; status = "disabled"; }; nca@2020100000 { compatible = "axxia,nca"; reg = <0x20 0x20100000 0 0x20000>; }; amba { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; serial0: uart@2010080000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10080000 0 0x1000>; interrupts = <0 56 4>; dmas = <&gpdma0 8>, <&gpdma0 9>; dma-names = "rx", "tx"; status = "disabled"; }; serial1: uart@2010081000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10081000 0 0x1000>; interrupts = <0 57 4>; dmas = <&gpdma0 8>, <&gpdma0 9>; dma-names = "rx", "tx"; status = "disabled"; }; serial2: uart@2010082000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10082000 0 0x1000>; interrupts = <0 58 4>; dmas = <&gpdma0 8>, <&gpdma0 9>; dma-names = "rx", "tx"; status = "disabled"; }; serial3: uart@2010083000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x20 0x10083000 0 0x1000>; interrupts = <0 59 4>; dmas = <&gpdma0 8>, <&gpdma0 9>; dma-names = "rx", "tx"; status = "disabled"; }; timer0: timer@2010091000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x20 0x10091000 0 0x1000>; interrupts = <0 46 4>, <0 47 4>, <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>, <0 52 4>, <0 53 4>; }; gpio0: gpio@2010092000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0x20 0x10092000 0x00 0x1000>; interrupts = <0 10 4>, <0 11 4>, <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>; interrupt-controller; #interrupt-cells = <2>; status = "disabled"; }; gpio1: gpio@2010093000 { #gpio-cells = <2>; compatible = "arm,pl061", "arm,primecell"; gpio-controller; reg = <0x20 0x10093000 0x00 0x1000>; interrupts = <0 18 4>; interrupt-controller; #interrupt-cells = <2>; status = "disabled"; }; spics: sspgpio@2010088030 { #gpio-cells = <2>; compatible = "axxia,ssp-gpio"; gpio-controller; reg = <0x20 0x10088000 0x00 0x1000>; status = "disabled"; }; spi0: ssp@2010088000 { compatible = "arm,pl022", "arm,primecell"; #address-cells = <1>; #size-cells = <0>; reg = <0x20 0x10088000 0x00 0x1000>; interrupts = <0 42 4>; enable-dma = <0>; num-cs = <5>; cs-gpios = <&spics 0 1>, <&spics 1 1>, <&spics 2 1>, <&spics 3 1>, <&spics 4 1>; status = "disabled"; }; }; }; };