Pl310 L2 Cache EDAC driver, it does reports the data and tag ram parity errors.

Required properties:
- compatible: Should be "arm,pl310-cache".
- intterupts: Interrupt number to the cpu.
- reg: Physical base address and size of cache controller's memory mapped
  registers

Example:
++++++++

	L2: cache-controller {
		compatible = "arm,pl310-cache";
		interrupts = <0 2 4>;
		reg = <0xf8f02000 0x1000>;
	};

PL310 L2 Cache EDAC driver detects the Parity enable state by reading the
appropriate control register.