diff options
-rw-r--r-- | arch/mips/oprofile/op_model_mipsxx.c | 13 | ||||
-rw-r--r-- | arch/mips/pci/fixup-malta.c | 21 | ||||
-rw-r--r-- | drivers/input/mousedev.c | 9 | ||||
-rw-r--r-- | drivers/input/serio/i8042-io.h | 2 |
4 files changed, 43 insertions, 2 deletions
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index c3e4c18ef8d4..0a05706da9fa 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -124,6 +124,17 @@ __define_perf_accessors(perfctrl, 1, 3) __define_perf_accessors(perfctrl, 2, 0) __define_perf_accessors(perfctrl, 3, 1) + +/* These two defines are only appropriate for qemu-system-mips. + They prevent illegal writes to performance registers and allow + oprofile timer mode to continue and be initialized fully. + + This should not merge to a common location, and only be applied + to emulated boards. +*/ +#define w_c0_perfctrl0(reg) {} +#define w_c0_perfcntr0(reg) {} + struct op_mips_model op_model_mipsxx_ops; static struct mipsxx_register_config { @@ -424,7 +435,9 @@ static int __init mipsxx_init(void) } save_perf_irq = perf_irq; +#if 0 perf_irq = mipsxx_perfcount_handler; +#endif if (get_c0_perfcount_int) perfcount_irq = get_c0_perfcount_int(); diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c index 8131e0ffe735..ffc068e7f13e 100644 --- a/arch/mips/pci/fixup-malta.c +++ b/arch/mips/pci/fixup-malta.c @@ -142,6 +142,27 @@ static void malta_piix_func1_fixup(struct pci_dev *pdev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB, malta_piix_func1_fixup); +/* Use the io resource allocated by YAMON */ +static void __init malta_pcnet32_ioports_fixup(struct pci_dev *pdev) +{ + u32 check = 0, new = 0x1060; + + pdev->resource[0].start = new; + pdev->resource[0].end = new + 0x1f; + + pci_write_config_dword(pdev, 0x10, new); + pci_read_config_dword(pdev, 0x10, &check); + + if ((new ^ check) & (u32)PCI_BASE_ADDRESS_IO_MASK) + printk(KERN_WARNING "pcnet32's BAR0 error updating (%#08x != %#08x)\n", + check, new); + else + printk(KERN_NOTICE "pcnet32's BAR0 updating is successful!\n"); +} + +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, + malta_pcnet32_ioports_fixup); + /* Enable PCI 2.1 compatibility in PIIX4 */ static void quirk_dlcsetup(struct pci_dev *dev) { diff --git a/drivers/input/mousedev.c b/drivers/input/mousedev.c index 2d7f691ec71c..d438bd1a2b77 100644 --- a/drivers/input/mousedev.c +++ b/drivers/input/mousedev.c @@ -27,6 +27,7 @@ #include <linux/device.h> #include <linux/cdev.h> #include <linux/kernel.h> +#include <asm/byteorder.h> MODULE_AUTHOR("Vojtech Pavlik <vojtech@ucw.cz>"); MODULE_DESCRIPTION("Mouse (ExplorerPS/2) device interfaces"); @@ -720,7 +721,8 @@ static ssize_t mousedev_read(struct file *file, char __user *buffer, { struct mousedev_client *client = file->private_data; struct mousedev *mousedev = client->mousedev; - u8 data[sizeof(client->ps2)]; + u16 data[sizeof(client->ps2)]; + int retval = 0; if (!client->ready && !client->buffer && mousedev->exist && @@ -748,6 +750,11 @@ static ssize_t mousedev_read(struct file *file, char __user *buffer, memcpy(data, client->ps2 + client->bufsiz - client->buffer, count); client->buffer -= count; +#ifdef CONFIG_CPU_BIG_ENDIAN + /* Force mouse data LE in userspace as consumers + of the data expect it in this format */ + cpu_to_le16p((__u16 *)data); +#endif spin_unlock_irq(&client->packet_lock); if (copy_to_user(buffer, data, count)) diff --git a/drivers/input/serio/i8042-io.h b/drivers/input/serio/i8042-io.h index 34da81c006b6..c402ecb63d60 100644 --- a/drivers/input/serio/i8042-io.h +++ b/drivers/input/serio/i8042-io.h @@ -76,7 +76,7 @@ static inline int i8042_platform_init(void) if (check_legacy_ioport(I8042_DATA_REG)) return -ENODEV; #endif -#if !defined(__sh__) && !defined(__alpha__) +#if !defined(__sh__) && !defined(__alpha__) && !defined(__mips__) if (!request_region(I8042_DATA_REG, 16, "i8042")) return -EBUSY; #endif |